US-CERT Vulnerability Note VU#162289

[Mark Mitchell]

Mark Mitchell wrote:

> I've been told that Intel's ICC compiler also does this optimization:

Apparently, IAR's Atmel AVR compiler does this optimization as well. 
That CPU has 16-bit addresses, so the tester changed the test case to 
use "1 << 14" instead of "1 << 30".

The generated code is:

    \   00000000   E000               LDI     R16, 0
    \   00000002   E010               LDI     R17, 0
    \   00000004   9508               RET

So, the compiler has optimized away the test.

It seems possible that IAR's compilers might do this on other processors 
as well, as there's no particular reason to think it's a CPU-dependent 
optimization.  But, that's just speculation.

Thanks,

-- 
Mark Mitchell
CodeSourcery
mark@codesourcery.com
(650) 331-3385 x713