error: unable to find a register to spill in class 'FP_REGS'

[Markus Franke]

Again with attachment and CC to the Mailing List. Sorry for missing this.
Regards,
Markus

---

Hello,

thanks for your instructions. Indeed you were right. I mixed up some files.
Again an excerpt of the output-files:

---snip--- // expand
(insn 45 47 46 1 (set (subreg:SI (reg:DI 92 [ D.1212 ]) 4)
        (reg:SI 93 [ D.1211 ])) -1 (nil)
    (expr_list:REG_NO_CONFLICT (reg:SI 93 [ D.1211 ])
        (nil)))
---snap---

---snip--- // lreg
(insn 45 47 46 0 (set (subreg:SI (reg:DI 92 [ D.1212 ]) 4)
        (reg:SI 93 [ D.1211 ])) 40 {movsi_general} (nil)
    (expr_list:REG_DEAD (reg:SI 93 [ D.1211 ])
        (expr_list:REG_NO_CONFLICT (reg:SI 93 [ D.1211 ])
            (nil))))
---snap---

---snip--- // greg
;; Function main (main)

Spilling for insn 45.
---snap---

Aditionally, you can find the three files in the attachment. It would be
really nice of you if you could have a look at it. Maybe you can get a
clue what's going wrong.

Regards,
Markus Franke

Jim Wilson wrote:
> Markus Franke wrote:
> 
>> That means the compiler has to reload the pseudo registers 92 and 93 for
>> this instruction, right?
> 
> 
> First we do register allocation.  Then, after register allocation, if
> the chosen hard registers don't match the constraints, then we use
> reload to fix it.
> 
>> The relevant data for instruction 45 in .greg looks like that:
> 
> 
> Insn 45 in the greg dump looks nothing like the insn 45 in the expand
> dump, which means you are looking at the wrong insn here.  But it was
> insn 45 in the original mail.  Did you change the testcase perhaps?  Or
> use different optimization options?
> 
> The info we are looking for should look something like this
> Reloads for insn # 13
> Reload 0: reload_out (SI) = (reg:SI 97)
>     R1_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
>     reload_out_reg: (reg:SI 97)
>     reload_reg_rtx: (reg:SI 1 %r1)
> 
>> ;; Register 92 in 9.
>> ;; Register 93 in 10.
> 
> 
> This tells us that pseudo 92 was allocated to hard reg 9, and pseudo 93
> was allocated to hard reg 10.  I didn't see reg class preferencing info
> for these regs, but maybe it is in one of the other dump files.
> 
> The earlier message has rtl claiming that pseudo 92 got allocated to
> register 1 (r1).  I seem to be getting inconsistent information here.

-- 
Nichts ist so praktisch wie eine gute Theorie!


-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: simple_alloc.c.00.expand
URL: <https://gcc.gnu.org/pipermail/gcc/attachments/20070316/9d925d5e/attachment.ksh>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: simple_alloc.c.36.lreg
URL: <https://gcc.gnu.org/pipermail/gcc/attachments/20070316/9d925d5e/attachment-0001.ksh>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: simple_alloc.c.37.greg
URL: <https://gcc.gnu.org/pipermail/gcc/attachments/20070316/9d925d5e/attachment-0002.ksh>