subreg pass

[Roman Zippel]

Hi,

The new subreg lowering pass seems to generate a bit worse code on m68k 
than before, let's take simple example:

unsigned long long f(unsigned long long a, unsigned long long b)
{
	return a + b;
}

where currently gcc generates code like this:

        move.l 16(%sp),%d1
        move.l 20(%sp),%d2
        move.l 8(%sp),%d0
        add.l 12(%sp),%d2
        addx.l %d0,%d1
        move.l %d1,%d0
        move.l %d2,%d1

whereas with -fno-split-wide-types it generates this:

        move.l 16(%sp),%d0
        move.l 20(%sp),%d1
        move.l 8(%sp),%d2
        add.l 12(%sp),%d1
        addx.l %d2,%d0

How can I get rid of these extra move instructions?

Another more general question would be how should be wide registers 
handled in general. In the past I tried to avoid splitting instructions 
before reload, exactly because the extra subregs caused worse code. Has 
this changed? AFAICT this would mean in the back end to split DI values as 
early as possible, which could have its advantages, but also its 
challenges, as m68k is still a cc0 target and with instructions like 
addx.l above, so far I avoided splitting these at all.

bye, Roman