REG_ALLOC_ORDER and Altivec registers

[Revital1 Eres]

Hello,

I wonder why this order (non-consecutive, decreasing) of Altivec registers
was chosen when specifying the allocation order in REG_ALLOC_ORDER.

(taken from rs6000.h)

   /* AltiVec registers.  */                                    \
   77, 78,                                                      \
   90, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80,                  \
   79,                                                          \
   96, 95, 94, 93, 92, 91,                                      \
   108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, 97,     \
   109, 110,                                                    \
   111, 112, 113                                                \

Thanks,
Revital