[CFG] what are class 3 edges ?
Sunzir Deepur
sunzird@gmail.com
Thu Aug 9 22:45:00 GMT 2007
Hi Emmanuel,
On 8/3/07, Emmanuel Fleury <fleury@labri.fr> wrote:
> Sunzir Deepur wrote:
> > what are class 3 edges ?
> > why make them ?
> > if i understand ok, they do not represent a legit flow of code...
>
> Switches:
>
> switch (c) {
> case '0':
> do some stuff;
> break;
> case '1':
> do some other stuff;
> break;
> default:
> exit(1);
> }
thank you for the replying.
i compiled the following simple code:
int main(int argc)
{
switch(argc) {
case 0:
printf("hi");
break;
default:
printf("hihihi");
break;
}
}
and produced the vcg file using -dv -fdump-rtl-stack.
the CFG have 3 of those class 3 edges. one of them link between the case 0
and the default case in the switch. I do not understand why does that edge
exist at all. it clearly links between two basic blocks that will not ever
have a flow of code between them. there is no way the default will be executed
after the case 0 because of the break instruction.
I have removed all class 3 edges from the vcg and then it became a more
loyal description of the legit flow of code. is that right ?
I am attaching the original vcg file, the one i made by removing the
class 3 edges,
and a jpeg picture of them (on the left is the original, the green edges are
the class 3 edges, and they connect between the two cases of the switches.
on the right is my new graph, no green edges. this one seems more right
to me).
so why are those class 3 edges created at all ?
thank you a lot for taking the time to help,
sunzir
>
> Regards
> --
> Emmanuel Fleury
>
> A thing is not necessarily true because a man dies for it.
> -- Oscar Wilde
>
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