Abt RTL expression - combining instruction
Rohit Arul Raj
rohitarulraj@gmail.com
Fri Nov 10 12:45:00 GMT 2006
Hi all,
Finally got the combined compare_and_branch instruction to work. But
it has some side effects while testing other files.
20010129-1.s: Assembler messages:
20010129-1.s:46: Error: Value of 0x88 too large for 7-bit relative
instruction offset
I just designed my compare and branch insn as given below:
(define_insn "compare_and_branch_insn"
[(set (pc)
(if_then_else (match_operator 3 "comparison_operator"
[(match_operand:SI 1 "register_operand" "r,r")
(match_operand:SI 2 "nonmemory_operand" "O,r")])
(label_ref (match_operand 0 "" ""))
(pc)))]
""
"*
output_asm_insn (\"cmp\\t%2, %1\", operands);
/* Body of branch insn */
"
[(set (attr "length") (if_then_else
(ltu
(plus
(minus
(match_dup 0)
(pc))
(const_int 128))
(const_int 250))
(const_int 4)
(if_then_else
(ltu
(plus
(minus
(match_dup 0)
(pc))
(const_int 65536))
(const_int 131072))
(if_then_else (eq_attr "align_lbranch" "true")
(const_int 6)
(const_int 5))
(if_then_else (eq_attr "call_type" "short")
(const_int 8)
(const_int 16)))))
(set_attr "delay_type" "delayed")
(set_attr "type" "compare,branch")]
)
1. Does attribute length affect the calculation of offset?
2. What are the other factors that i have to take into consideration
while combining a compare and branch instruction.
Regards,
Rohit
On 08 Nov 2006 07:00:29 -0800, Ian Lance Taylor <iant@google.com> wrote:
> "Rohit Arul Raj" <rohitarulraj@gmail.com> writes:
>
> > I have used cbranchmode4 instruction to generate combined compare and
> > branch instruction.
> >
> > (define_insn "cbranchmode4"
> > (set (pc) (if_then_else
> > (match_operator:CC 0 "comparison_operator"
> > [ (match_operand:SI 1 "register_operand" "r,r")
> > (match_operand:SI 2 "nonmemory_operand" "O,r")])
> > (label_ref (match_operand 3 "" ""))
> > (pc)))]
> > This pattern matches if the code is of the form
> >
> > if ( h == 1)
> > p = 0;
> >
> > if the code is of the form
> > if (h), if (h >= 0)
> > p = 0;
> >
> > Then it matches the seperate compare and branch instructions and not
> > cbranch instruction.
> >
> > Can anyone point out where i am going wrong?
>
> If you have a cbranch insn, and you want that one to always be
> recognized, then why do you also have separate compare and branch
> insns?
>
> Ian
>
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