Inserting a GIMPLE node in a SSA form representation pass

sean yang seanatpurdue@hotmail.com
Tue Jul 18 07:49:00 GMT 2006


I'd like to ask a question about difference of SSA-form representation and 
GIMPLE representation. I thanks you for your answer.

My understanding is that any stmt node insertion operation in a pass between 
building-SSA pass and un-SSA pass should uses SSA-form representation. But 
the following function (schedule_sm() in tree-ssa-loop-im.c in GCC4.0.2) 
inserts a stmt node " store = build (MODIFY_EXPR, void_type_node, 
unshare_expr (ref), tmp_var);" with a regular GIMPLE representation. So my 
question is: nder what situation, GIMPLE node and SSA-form node is same. 
Specifically, is a CALL_INSN stmt under these two TREE IR same? i.e., 
inserting a CALL_INSN (to do some intrumentation statistics) with GIMPLE 
form would not cause error?

Can someone give a brief introduction? Hopefully my question is clear:)

Thanks again,
Sean


--------------------------------------------------------------------------------------------------------
static void
schedule_sm (struct loop *loop, edge *exits, unsigned n_exits, tree ref,
	     struct mem_ref *mem_refs)
{
  struct mem_ref *aref;
  tree tmp_var;
  unsigned i;
  tree load, store;
  struct fmt_data fmt_data;

  if (dump_file && (dump_flags & TDF_DETAILS))
    {
      fprintf (dump_file, "Executing store motion of ");
      print_generic_expr (dump_file, ref, 0);
      fprintf (dump_file, " from loop %d\n", loop->num);
    }

  tmp_var = make_rename_temp (TREE_TYPE (ref), "lsm_tmp");

  fmt_data.loop = loop;
  fmt_data.orig_loop = loop;
  for_each_index (&ref, force_move_till, &fmt_data);

  rewrite_mem_refs (tmp_var, mem_refs);
  for (aref = mem_refs; aref; aref = aref->next)
    if (LIM_DATA (aref->stmt))
      LIM_DATA (aref->stmt)->sm_done = true;

  /* Emit the load & stores.  */
  load = build (MODIFY_EXPR, void_type_node, tmp_var, ref);
  get_stmt_ann (load)->common.aux = xcalloc (1, sizeof (struct 
lim_aux_data));
  LIM_DATA (load)->max_loop = loop;
  LIM_DATA (load)->tgt_loop = loop;

  /* Put this into the latch, so that we are sure it will be processed after
     all dependencies.  */
  bsi_insert_on_edge (loop_latch_edge (loop), load);

  for (i = 0; i < n_exits; i++)
    {
      store = build (MODIFY_EXPR, void_type_node,
		     unshare_expr (ref), tmp_var);
      bsi_insert_on_edge (exits[i], store);
    }
}

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