libgomp and OMP_NUM_THREADS
Jakub Jelinek
jakub@redhat.com
Fri Jan 20 00:12:00 GMT 2006
On Thu, Jan 19, 2006 at 04:35:17PM -0700, Walter Szeliga wrote:
> Hello,
> It appears that although the most recent svn update (Revision
> 109975) of gcc compiles apparently fine, simple OpenMP programs will
> only operate when OMP_NUM_THREADS=1. I am compiling and running gcc
> on a Dual CPU G5 PowerPC running OS X 10.4.4. If I compile
> omp_hello.c from testsuite/libgomp.c with
>
> gcc -fopenmp omp_hello.c -o omp_hello -lgomp
>
> then the program reports that 1 thread is created. If I then set
> OMP_NUM_THREADS=2, omp_hello hangs. If one runs recomplies this
> program, runs it in gdb and Ctrl-C's it when it hangs, here is the
> backtrace generated
Yeah, that's a known thing, libgomp is miscompiled on PowerPC.
>
> #0 0x900c48fc in sem_wait ()
> #1 0x00020c24 in gomp_sem_wait (sem=0x222c4) at ../../../gomp/
> libgomp/config/posix/sem.c:44
> #2 0x00020d68 in gomp_barrier_wait_end (bar=0x22298,
> last=4294967295) at ../../../gomp/libgomp/config/posix/bar.c:92
> #3 0x000202f8 in gomp_team_start (fn=0x2a08 <main.omp_fn.0>,
> data=0x0, nthreads=2, work_share=0x0) at ../../../gomp/libgomp/team.c:
> 293
> #4 0x000029e0 in main (argc=1, argv=0xbffff714) at omp_hello.c:33
On redhat/gcc-4_1-branch (which has also a gomp branch backport)
I'm using following patch that cures it, but I bet it won't apply cleanly
to the trunk.
2005-11-25 Jakub Jelinek <jakub@redhat.com>
* config/rs6000/rs6000.md (UNSPEC_LWSYNC, UNSPEC_ISYNC,
UNSPEC_SYNC_OP, UNSPEC_ATOMIC, UNSPEC_CMPXCHG, UNSPEC_XCHG): Rename
to...
(UNSPECV_LWSYNC, UNSPECV_ISYNC, UNSPECV_SYNC_OP, UNSPECV_ATOMIC,
UNSPECV_CMPXCHG, UNSPECV_XCHG): ... these.
* config/rs6000/sync.md: Adjust for the above changes, use
unspec_volatile instead of unspec for
UNSPECV_{SYNC_OP,ATOMIC,CMPXCHG,XCHG}.
--- gcc/config/rs6000/sync.md.jj 2005-11-24 13:24:35.000000000 +0100
+++ gcc/config/rs6000/sync.md 2005-11-25 10:43:31.000000000 +0100
@@ -70,10 +70,10 @@
[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
(match_operand:GPR 1 "memory_operand" "+Z"))
(set (match_dup 1)
- (unspec:GPR
+ (unspec_volatile:GPR
[(match_operand:GPR 2 "reg_or_short_operand" "rI")
(match_operand:GPR 3 "gpc_reg_operand" "r")]
- UNSPEC_CMPXCHG))
+ UNSPECV_CMPXCHG))
(clobber (match_scratch:GPR 4 "=&r"))
(clobber (match_scratch:CC 5 "=&x"))]
"TARGET_POWERPC"
@@ -90,9 +90,9 @@
[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
(match_operand:GPR 1 "memory_operand" "+Z"))
(set (match_dup 1)
- (unspec:GPR
+ (unspec_volatile:GPR
[(match_operand:GPR 2 "reg_or_short_operand" "rL")]
- UNSPEC_XCHG))
+ UNSPECV_XCHG))
(clobber (match_scratch:GPR 3 "=&r"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -107,10 +107,10 @@
(define_expand "sync_<fetchop_name><mode>"
[(parallel [(set (match_operand:INT1 0 "memory_operand" "")
- (unspec:INT1
+ (unspec_volatile:INT1
[(FETCHOP:INT1 (match_dup 0)
(match_operand:INT1 1 "<fetchop_pred>" ""))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -128,10 +128,10 @@
(define_insn_and_split "*sync_<fetchop_name>si_internal"
[(set (match_operand:SI 0 "memory_operand" "+Z")
- (unspec:SI
+ (unspec_volatile:SI
[(FETCHOP:SI (match_dup 0)
(match_operand:SI 1 "<fetchop_pred>" "<fetchopsi_constr>"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:SI 2 "=&b"))
(clobber (match_scratch:CC 3 "=&x"))]
"TARGET_POWERPC"
@@ -146,10 +146,10 @@
(define_insn_and_split "*sync_<fetchop_name>di_internal"
[(set (match_operand:DI 0 "memory_operand" "+Z")
- (unspec:DI
+ (unspec_volatile:DI
[(FETCHOP:DI (match_dup 0)
(match_operand:DI 1 "<fetchop_pred>" "<fetchopdi_constr>"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:DI 2 "=&b"))
(clobber (match_scratch:CC 3 "=&x"))]
"TARGET_POWERPC"
@@ -164,10 +164,10 @@
(define_expand "sync_nand<mode>"
[(parallel [(set (match_operand:INT1 0 "memory_operand" "")
- (unspec:INT1
+ (unspec_volatile:INT1
[(and:INT1 (not:INT1 (match_dup 0))
(match_operand:INT1 1 "gpc_reg_operand" ""))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -187,10 +187,10 @@
(define_insn_and_split "*sync_nand<mode>_internal"
[(set (match_operand:GPR 0 "memory_operand" "+Z")
- (unspec:GPR
+ (unspec_volatile:GPR
[(and:GPR (not:GPR (match_dup 0))
(match_operand:GPR 1 "gpc_reg_operand" "r"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:GPR 2 "=&r"))
(clobber (match_scratch:CC 3 "=&x"))]
"TARGET_POWERPC"
@@ -207,10 +207,10 @@
[(parallel [(set (match_operand:INT1 0 "gpc_reg_operand" "")
(match_operand:INT1 1 "memory_operand" ""))
(set (match_dup 1)
- (unspec:INT1
+ (unspec_volatile:INT1
[(FETCHOP:INT1 (match_dup 1)
(match_operand:INT1 2 "<fetchop_pred>" ""))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -230,10 +230,10 @@
[(set (match_operand:SI 0 "gpc_reg_operand" "=&r")
(match_operand:SI 1 "memory_operand" "+Z"))
(set (match_dup 1)
- (unspec:SI
+ (unspec_volatile:SI
[(FETCHOP:SI (match_dup 1)
(match_operand:SI 2 "<fetchop_pred>" "<fetchopsi_constr>"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:SI 3 "=&b"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -250,10 +250,10 @@
[(set (match_operand:DI 0 "gpc_reg_operand" "=&r")
(match_operand:DI 1 "memory_operand" "+Z"))
(set (match_dup 1)
- (unspec:DI
+ (unspec_volatile:DI
[(FETCHOP:DI (match_dup 1)
(match_operand:DI 2 "<fetchop_pred>" "<fetchopdi_constr>"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:DI 3 "=&b"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -270,10 +270,10 @@
[(parallel [(set (match_operand:INT1 0 "gpc_reg_operand" "")
(match_operand:INT1 1 "memory_operand" ""))
(set (match_dup 1)
- (unspec:INT1
+ (unspec_volatile:INT1
[(and:INT1 (not:INT1 (match_dup 1))
(match_operand:INT1 2 "gpc_reg_operand" ""))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -295,10 +295,10 @@
[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
(match_operand:GPR 1 "memory_operand" "+Z"))
(set (match_dup 1)
- (unspec:GPR
+ (unspec_volatile:GPR
[(and:GPR (not:GPR (match_dup 1))
(match_operand:GPR 2 "gpc_reg_operand" "r"))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:GPR 3 "=&r"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -317,9 +317,9 @@
(match_operand:INT1 1 "memory_operand" "")
(match_operand:INT1 2 "<fetchop_pred>" "")))
(set (match_dup 1)
- (unspec:INT1
+ (unspec_volatile:INT1
[(FETCHOP:INT1 (match_dup 1) (match_dup 2))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -341,9 +341,9 @@
(match_operand:SI 1 "memory_operand" "+Z")
(match_operand:SI 2 "<fetchop_pred>" "<fetchopsi_constr>")))
(set (match_dup 1)
- (unspec:SI
+ (unspec_volatile:SI
[(FETCHOP:SI (match_dup 1) (match_dup 2))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:SI 3 "=&b"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -362,9 +362,9 @@
(match_operand:DI 1 "memory_operand" "+Z")
(match_operand:DI 2 "<fetchop_pred>" "<fetchopdi_constr>")))
(set (match_dup 1)
- (unspec:DI
+ (unspec_volatile:DI
[(FETCHOP:DI (match_dup 1) (match_dup 2))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:DI 3 "=&b"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -383,9 +383,9 @@
(not:INT1 (match_operand:INT1 1 "memory_operand" ""))
(match_operand:INT1 2 "gpc_reg_operand" "")))
(set (match_dup 1)
- (unspec:INT1
+ (unspec_volatile:INT1
[(and:INT1 (not:INT1 (match_dup 1)) (match_dup 2))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (scratch:INT1))
(clobber (scratch:CC))])]
"TARGET_POWERPC"
@@ -409,9 +409,9 @@
(not:GPR (match_operand:GPR 1 "memory_operand" "+Z"))
(match_operand:GPR 2 "gpc_reg_operand" "r")))
(set (match_dup 1)
- (unspec:GPR
+ (unspec_volatile:GPR
[(and:GPR (not:GPR (match_dup 1)) (match_dup 2))]
- UNSPEC_ATOMIC))
+ UNSPECV_ATOMIC))
(clobber (match_scratch:GPR 3 "=&r"))
(clobber (match_scratch:CC 4 "=&x"))]
"TARGET_POWERPC"
@@ -469,10 +469,11 @@
(and:SI (not:SI (match_dup 4)) (match_dup 0))))
(set (match_operand:SI 3 "gpc_reg_operand" "=&b") (match_dup 0))
(set (match_dup 0)
- (unspec:SI [(ior:SI (and:SI (plus:SI (match_dup 0) (match_dup 1))
- (match_dup 4))
- (and:SI (not:SI (match_dup 4)) (match_dup 0)))]
- UNSPEC_SYNC_OP))
+ (unspec_volatile:SI
+ [(ior:SI (and:SI (plus:SI (match_dup 0) (match_dup 1))
+ (match_dup 4))
+ (and:SI (not:SI (match_dup 4)) (match_dup 0)))]
+ UNSPECV_SYNC_OP))
(clobber (match_scratch:CC 5 "=&x"))
(clobber (match_scratch:SI 6 "=&r"))]
"TARGET_POWERPC && !PPC405_ERRATUM77"
@@ -487,10 +488,11 @@
(and:SI (not:SI (match_dup 4)) (match_dup 0))))
(set (match_operand:SI 3 "gpc_reg_operand" "=&b") (match_dup 0))
(set (match_dup 0)
- (unspec:SI [(ior:SI (and:SI (minus:SI (match_dup 0) (match_dup 1))
- (match_dup 4))
- (and:SI (not:SI (match_dup 4)) (match_dup 0)))]
- UNSPEC_SYNC_OP))
+ (unspec_volatile:SI
+ [(ior:SI (and:SI (minus:SI (match_dup 0) (match_dup 1))
+ (match_dup 4))
+ (and:SI (not:SI (match_dup 4)) (match_dup 0)))]
+ UNSPECV_SYNC_OP))
(clobber (match_scratch:CC 5 "=&x"))
(clobber (match_scratch:SI 6 "=&r"))]
"TARGET_POWERPC && !PPC405_ERRATUM77"
@@ -503,8 +505,8 @@
(match_operand:SI 1 "and_operand" "r,T,K,L")))
(set (match_operand:SI 3 "gpc_reg_operand" "=&b,&b,&b,&b") (match_dup 0))
(set (match_dup 0)
- (unspec:SI [(and:SI (match_dup 0) (match_dup 1))]
- UNSPEC_SYNC_OP))
+ (unspec_volatile:SI [(and:SI (match_dup 0) (match_dup 1))]
+ UNSPECV_SYNC_OP))
(clobber (match_scratch:CC 4 "=&x,&x,&x,&x"))]
"TARGET_POWERPC && !PPC405_ERRATUM77"
"@
@@ -520,7 +522,7 @@
[(match_operand:SI 0 "memory_operand" "+Z,Z,Z")
(match_operand:SI 1 "logical_operand" "r,K,L")]))
(set (match_operand:SI 3 "gpc_reg_operand" "=&b,&b,&b") (match_dup 0))
- (set (match_dup 0) (unspec:SI [(match_dup 4)] UNSPEC_SYNC_OP))
+ (set (match_dup 0) (unspec_volatile:SI [(match_dup 4)] UNSPECV_SYNC_OP))
(clobber (match_scratch:CC 5 "=&x,&x,&x"))]
"TARGET_POWERPC && !PPC405_ERRATUM77"
"@
@@ -540,7 +542,7 @@
(match_operand:SI 5 "logical_operand" "rK"))
(match_operand:SI 1 "gpc_reg_operand" "r")]))
(set (match_operand:SI 3 "gpc_reg_operand" "=&b") (match_dup 0))
- (set (match_dup 0) (unspec:SI [(match_dup 4)] UNSPEC_SYNC_OP))
+ (set (match_dup 0) (unspec_volatile:SI [(match_dup 4)] UNSPECV_SYNC_OP))
(clobber (match_scratch:CC 6 "=&x"))]
"TARGET_POWERPC && !PPC405_ERRATUM77"
"lwarx %3,%y0\n\txor%I2 %2,%3,%5\n\t%q4 %2,%2,%1\n\tstwcx. %2,%y0\n\tbne- $-16"
@@ -548,7 +550,7 @@
(define_insn "isync"
[(set (mem:BLK (match_scratch 0 "X"))
- (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_ISYNC))]
+ (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_ISYNC))]
""
"{ics|isync}"
[(set_attr "type" "isync")])
@@ -567,7 +569,7 @@
; Some AIX assemblers don't accept lwsync, so we use a .long.
(define_insn "lwsync"
[(set (mem:BLK (match_scratch 0 "X"))
- (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_LWSYNC))]
+ (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_LWSYNC))]
""
".long 0x7c2004ac"
[(set_attr "type" "sync")])
--- gcc/config/rs6000/rs6000.c.jj 2005-11-24 13:24:35.000000000 +0100
+++ gcc/config/rs6000/rs6000.c 2005-11-25 10:46:23.000000000 +0100
@@ -12076,9 +12076,9 @@ rs6000_emit_sync (enum rtx_code code, en
set_after = gen_rtx_SET (VOIDmode, after, the_op);
set_before = gen_rtx_SET (VOIDmode, before, used_m);
set_atomic = gen_rtx_SET (VOIDmode, used_m,
- gen_rtx_UNSPEC (used_mode,
+ gen_rtx_UNSPEC_VOLATILE (used_mode,
gen_rtvec (1, the_op),
- UNSPEC_SYNC_OP));
+ UNSPECV_SYNC_OP));
cc_scratch = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (CCmode));
if ((code == PLUS || code == MINUS) && used_mode != mode)
--- gcc/config/rs6000/rs6000.md.jj 2005-11-24 13:24:35.000000000 +0100
+++ gcc/config/rs6000/rs6000.md 2005-11-25 10:45:27.000000000 +0100
@@ -61,12 +61,6 @@
(UNSPEC_SP_SET 35)
(UNSPEC_SP_TEST 36)
(UNSPEC_SYNC 37)
- (UNSPEC_LWSYNC 38)
- (UNSPEC_ISYNC 39)
- (UNSPEC_SYNC_OP 40)
- (UNSPEC_ATOMIC 41)
- (UNSPEC_CMPXCHG 42)
- (UNSPEC_XCHG 43)
(UNSPEC_AND 44)
])
@@ -79,6 +73,12 @@
(UNSPECV_LL 1) ; load-locked
(UNSPECV_SC 2) ; store-conditional
(UNSPECV_EH_RR 9) ; eh_reg_restore
+ (UNSPECV_LWSYNC 38)
+ (UNSPECV_ISYNC 39)
+ (UNSPECV_SYNC_OP 40)
+ (UNSPECV_ATOMIC 41)
+ (UNSPECV_CMPXCHG 42)
+ (UNSPECV_XCHG 43)
])
;; Define an insn type attribute. This is used in function unit delay
Jakub
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