Insn for direct increment of memory?

[Greg McGary]

I'm working with a machine that has a memory-increment insn.  It's a
network-processor performance hack that allows no-latency accumulation
of statistical counters.  The insn sends the increment and address to
the memory controller which does the add, avoiding the usual
long-latency read-increment-write cycle.  I would like to persuade GCC
to emit this insn.  Maybe it could be done in the combiner?  Do any
GCC ports have this feature?

Greg