problem with dependencies in gcc-4.0-20040911

[Vladimir Makarov]

Kunal Parmar wrote:

>Hello,
>I am working with a VLIW processor and GCC-4.0-20040911. There is a
>problem in the dependency calculation of GCC. GCC is giving
>write-after-read a higher priority than write-after-write. Thus, as in
>the following code, GCC gives a write-after-read dependency between
>the 2 instructions. Due to this the 2 instructions are scheduled
>together.
>
>stw --b15,*a15          ;; pre-decrement b15 and store its contents in memory
>add 4,a15,b15          ;; b15 = a15+4
>
>The first instruction reads b15 and then writes b15(pre-decrement).
>The second writes to b15. Thus there exists a write-after-read and a
>write-after-write dependency from the second instruction on the first.
>But GCC keeps only the more restrictive dependency which is determined
>by reg-notes.def (line 98). The updation of dependency takes place is
>sched-deps.c (line 304). Accordingly, GCC puts a write-after-read
>dependency between the 2 instructions. Due to this, the 2 instructions
>are scheduled for execution in parallel. This results in 2 writes to
>the same register on the same clock cycle.
>
>As of now, I have the interchanged the 2 lines in reg-notes.def (line
>98 and 99).
>
>  
>
Please use hook variable_issue or dfa_new_cycle to solve the problem. 
 You can use  Itanium port as example how to solve WAW conflict for VLIW 
processors.

Vlad