problem with the scheduler

[Kunal Parmar]

Hello,
I am working with c6x processor from TI. It has a VLIW architecture.
It has 32 registers namedly a0-a15 and b0-b15. b15 is used as the SP
in the current port.
I am facing a problem with the scheduler of GCC. 
Following is the c code I was compiling - 

*******************************
int mult(int a,int b) {
  int result=0,flag;

  if(b<0)
    flag=1;
  else
    flag=-1;
  for(;b;b+=flag)
    result += a;
  return result;
}

int main() {
  return mult(5,4);
}
********************************

Following is part of the assembly generated by GCC - 

*********************************
mult:
        stw     .D2T1   a15,    *--b15
||      mvk             0,      b4
        mv              b15,    a15
        ldw     .D1T2   *+a15[3],       b1
        ldw     .D1T1   *+a15[2],       a3
        nop             3
        cmplt           b1,     b4,     b0
        [ b0] mvkl              L2,     b4               ;
        [ b0] mvkh              L2,     b4
        [ b0] b         b4
        nop             5
        [ b1] mvkl              L5,     b4
||      mvk             0,      a4
        [ b1] mvkh              L5,     b4
        [ b1] b         b4
        nop             5
        ;; problem - this should have been scheduled before
        ;; the branch instruction
        mvk             -1,     b3
L9:
        ldw     .D1T2   *+a15[1],       b14
||      mv              a15,    b15
        ldw     .D2T1   *b15++, a15
        add             4,      b15,    b15
        nop             2
        b       .S2     b14
        nop             5
L2:
        mvk             0,      a4
||      mvk             1,      b3
L5:
        add             b3,     b1,     b1
||      add             a3,     a4,     a4
        [ b1] mvkl              L5,     b4
        [ b1] mvkh              L5,     b4
        [ b1] b         b4
        nop             5
        b       .S2     L9
        nop             5
***************************************