addsi3 with set condition register

[Nathan Sidwell]

ibanez@sunplus.com wrote:

>   (insn 12 11 13 (set (reg:SI 168)
>         (plus:SI (reg/v:SI 166 [ a ])
>             (reg/v:SI 167 [ b ]))) -1 (nil)
>     (nil))
> 
>   (insn 13 12 14 (set (reg:CC 33 cr1)
>         (compare:CC (reg:SI 168)
>             (const_int 0 [0x0]))) -1 (nil)
>     (nil))
> My pattern is
> 
>  (define_insn "..."
>   [ (set (match_operand:SI 0 "register_operand" "=g")
>        (plus:SI (match_operand:SI 1 "register_operand" "g")
>               (match_operand:SI 2 "register_operand" "g")) )
>     (set
>         (reg:CC CC_REGNUM)
>         (compare:CC (match_dup 0) (const_int 0)))]

your pattern is not equivalent to the two instructions shown.  (the pattern is a 
parallel, the insns are a sequence)

nathan

-- 
Nathan Sidwell    ::   http://www.codesourcery.com   ::     CodeSourcery LLC
nathan@codesourcery.com    ::     http://www.planetfall.pwp.blueyonder.co.uk