new-new-ra thoughts
James E Wilson
wilson@specifixinc.com
Wed Jan 12 01:12:00 GMT 2005
Nathanael Nerode wrote:
> Does someone have a list of the major uses of subregs? :-) Maybe we can work
> out some more logical treatment of them.
Here is an attempt to categorize them.
1) Extracting part of a register. The register allocator relies on the
fact that pseudo-regs have unique shared RTL, and thus register
allocation can be performed with a single store to REGNO (reg). See
alter_reg. If pseudo-regs were not unique, then we would have to scan
all RTL to find all references, and fix them all, which would be
impractical. Thus any reference to a pseudo-reg in a different mode
than its native mode requires a subreg. This is the original use for
subregs.
a) Extracting a low part subset of a word sized or smaller register.
This occurs for example when casting an int register to a char. This
generally has no effect on register allocation, as long as the
constraints matched by the pattern are satisfied.
b) Extracting a non-low part subset of a word sized of smaller register.
This is poorly supported and probably doesn't work in most places. It
wasn't even possible to express this until subregs were changed to use
byte offsets instead of word offsets. This probably doesn't occur much
if at all in practice.
c) Extracting a low part subset of a larger than word sized register.
This is like 1a above, except that the meaning also depends on the word
endianness.
d) Extracting a non-low part subset of a larger than word sized
register. This is well defined only cases where the size and alignment
are word sized or a multiple of word sized. This is used when we want
to perform operations piecemeal. For instance, moving a double word
register one register at a time. The meaning depends on word
endianness, but otherwise isn't much different from 1a above.
2) Mode punning. This can result from type punning, e.g. using SImode
to access an SFmode register. This can also be used in conjunction with
1d above, e.g. splitting a DFmode register into two SImode parts. This
is also sometimes an artifact of how an md file is written. Some
targets have restrictions on mode punning, so this is valid only when
CANNOT_CHANGE_MODE_CLASS allows it. Otherwise, this generally doesn't
affect register allocation as long as constraints match.
3) Making md file RTL match hardware. We don't have RTL operations for
all possible hardware operations. Also, most RTL operators have
assumptions about the modes of their operands that must be maintained.
subregs are convenient for solving these kinds of problems. A subreg
can be used to change the size and/or mode class of an operand or an
operator as necessary. A subreg can be used to make a value larger when
neither zero_extend nor sign_extend is appropriate. This is usually the
case when the extra bits are don't care bits. These have no effect on
register allocation, as they are not part of the operands.
4) Paradoxical subregs. A paradoxical subreg is used when we operate on
a register using a larger mode than the native mode of the register.
When we have a paradoxical subreg, all of extra bits above the native
mode of the register are don't care bits. For instance, on an alpha,
which lacks many 32-bit operations, we perform 32-bit addition by using
DImode paradoxical subregs of SImode pseudo-regs. The upper 32-bits of
the register are don't care bits.
a) Word sized or smaller paradoxical subreg of a word sized of smaller
pseudo reg. Generally no effect on register allocation as long as the
constraints match. This is the alpha addition case mentioned above.
b) Larger than word sized paradoxical subreg of a pseudo reg. This may
affect register allocation, as we may need to allocate more space for a
pseudo register than its native size. Since the extra bits are don't
care bits, we can sometimes optimize away the need to allocate more
space, so we don't always need the extra space. If we force the pseudo
into a stack slot, then we do need the extra space in the stack slot.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
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