ia64 mulv8qi3 expander

[Richard Henderson]

On Wed, Jan 05, 2005 at 03:37:53PM +0100, Jan Beulich wrote:
> (1) Trying to get is used triggers an ICE at config/ia64/ia64.c:5211
> (in rtx_needs_barrier). Fixing this requires CONST_* to be added to the
> circumventing condition for the call to abort at the end of the PARALLEL
> case in that function.

Ah, right.  Well, something along those lines.  I'm going to
special-case VEC_SELECT in that function.

It's what I get for assuming that the testsuite would excercise 
all the basic arithmetic ...

> (3) The final gen_pack2_sss is making the whole thing behave
> differently than 8 individual multiplications: the latter would yield
> reduced modulo 2**n (with n being the width of the type, 8 here)
> results, this instruction, however, saturates overflowed values.

Hmm.  I think I meant .uss, since I know that I've reduced the
value to 0-255.  But that said, your version is two insns shorter,
so I'm going to use it instead.  Thanks.

> Additionally, the itanium_class attribute of mulv4hi3 is wrong, it
> should be mmmul.

Fixed.

> Finally, the three (out of four) fpack_* having either or both operands
> designated as xf seem wrong to me, as there's not going to be any
> rounding nor any FP exceptions (the scalar code always correctly issues
> fnorm.s for such truncations). I think these three need to be removed.

You're right.  I was confused and interpreting "converted to single
precision" in an ia32 context, which would include rounding.



r~