OT: How is memory latency important on AMD64 box while compiling large C/C++ sources

[Mike Stump]

On Tuesday, April 12, 2005, at 06:38  AM, Karel Gardas wrote:
> Especially: ``Currently gcc takes a cache miss every 20 instructions, 
> or
> some ungodly number, and that really saps performance.''
>
> but I don't know if this is just an 1st April fool joke

Nope, no joke.  The exact number will vary from machine to machine, and 
testcase to testcase, but it is much lower than most workloads.

>  or the reality and if I understand "cache miss" right and if this is 
> L1 or L2 cache miss.

D3 miss as I recall.

cachegrind can also be used to estimate the number (though, not sure 
how accurate it is, possibly not very).  I use Shark to actually get 
the real number.

If you can get the SPEC ratings of the machine, you can then just pull 
out the gcc specint number, and have a rough guess what type of compile 
time performance you would get.  A open mosix cluster with 4 cheap 
machines I suspect will compile faster (prive/performance) than one 
big, expensive box (rough guess).

We talked about this before, see:

http://gcc.gnu.org/ml/gcc/2002-08/msg00853.html
http://gcc.gnu.org/ml/gcc/2002-08/msg00886.html
http://gcc.gnu.org/ml/gcc/2002-08/msg01174.html
http://gcc.gnu.org/ml/gcc/2002-08/msg00763.html

for examples...