More on memory barriers

[Richard Henderson]

On Wed, Sep 15, 2004 at 05:54:32PM -0400, Jason Merrill wrote:
> > For i386 and ia64, speculation is canceled by cache probes.
> 
> OK.  Can you point me at the relevant documentation?

For ia64, speculation is under direct user control.  Read all
about the ALAT to see when entries are deleted.  In architecture
software developer's manual, volume 1: application architecture,
section 4.4.5.3.2 seems relevant.  That plus the definition of
architectually visible memory ordering in the next section.

For ia32, Architecture software developer's manual, volume 3:
System programming guide, section 10.4 Cache Control Protocol
is relevant, as is 7.2 Memory Ordering.



r~