More on memory barriers

Richard Henderson rth@redhat.com
Tue Sep 14 22:39:00 GMT 2004


On Tue, Sep 14, 2004 at 05:25:03PM -0400, Jason Merrill wrote:
> Or is it the case on all of these targets that using a more heavyweight
> barrier (i.e. sync on PPC) invalidates speculative loads on other
> processors?

I believe that's true of all of them, yes.  I know for absolute
certain it's true for the Intel architectures.


r~



More information about the Gcc mailing list