RFC: Using mode and code macros in *.md files
Steve Ellcey
sje@cup.hp.com
Wed Sep 1 18:33:00 GMT 2004
> > One thought I had was this: If there were an IF mode (infinite
> > precision), and a single basic floating point add for that mode
> >
> > (set (match_operand:IF ...)
> > (plus:IF (match_operand:IF ...)
> > (match_operand:IF ...)))
> >
> > and then there would be no basic add instruction for any other floating
> > point mode (SF, DF, or XF) then GCC will extend any of those to IFmode
> > to do the add. I tested that and GCC did the float_extends.
>
> But that would make your instructions non-canonical, thus a number of
> optimizers - in particular combine - will fail to match your patterns.
>
> Unless you propose to change the canonical form to use extension to IF
> in every operation, which would pretty much mean rewriting most of the
> rtl optimizers and all the target ports...
I hadn't thought about that. I did experiment with this a little by
removing the addsf and adddf instructions from my ia64.md file and
forcing it to use addxf. I added one new optmization to combine,
removing '(float_extend:XF (float_truncate:SF XF)' type constructs if
flag_unsafe_math_optimizations is set. This is now generating IA64
combined instructions (like add-mult) the way I want, I'll have to
experiment some more to see if it stops other optimizations.
Hopefully, with optimizations moving up into trees and SSA the RTL
optimizations won't come into play as much.
Steve Ellcey
sje@cup.hp.com
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