GCC DFA Instruction Scheduler

[Vladimir N. Makarov]

Sonawane Sachin Vijayku wrote:

>
> Hi all,
>  I am doing my M.Tech from  IIT Bombay and some part of my Project is 
> related with GCC DFA based Instruction Scheduler.
>
>  I am desparately look for an implementation of this DFA based 
> Instruction Scheduler in GCC, which has been suggested by a paper 
> titled as "The finite state automaton based pipeline hazard recognizer 
> and instruction scheduler in GCC" by Vladimir N. Markarov.
>
>  Please let me know, which version of GCC has used this new model of 
> describing pipeline characteristics of which processors through .md file.
> and also "First cycle multipass Instruction Scheduling" suggested in 
> the same paper has been implemented or not.

DFA based scheduler (including "First cycle multipass Instruction 
Scheduling") is present in gcc since gcc-3.2. Itanium dfa descriptions 
mentioned in the article are  present since  gcc-3.3.   Please read gcc 
documentation to learn how to use this stuff.

As any other new approach it has advantages and disadvantages. One 
disadvantage is difficulty of implementation of modulo scheduling.  It 
is more fit to implementation of perfect software pipelining algorithms.

Vlad