GREG Expansion Problem
Philip Brown
pbrown00@earthlink.net
Thu Jun 24 14:17:00 GMT 2004
I retargeted GCC 2.x to a unique target, and am now trying to port the
retarget to GCC 3.x.
The target in question has a number of unique properties, particularly as
regards memory access. While there are a set of symmetric general purpose
data registers, memory management is conducted thru a set of asymmetric
special-purpose registers. In order to support this, in each of the movXX
routines in the .md file, I call a memory management gen_ routine which
intercepts all MEM RTX's and replaces them with RTX's to setup the proper
registers and a MEM RTX which does the final step.
In light of this, I cannot allow the reload pass to remap a pseudo-register
into a stack slot (or any other kind of memory reference.)
In GCC 3.x, I am getting gen_mov called with RTX's similar to:
(reg/v/f:SI 32).
Seeing that this is a straight-forward reg, I take no special action in the
gen_movXX routines. However, GREG is changing the aforementioned RTX to
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])).
By the time this change occurs it is too late for me to take any action.
Worse yet, GREG does not change the matching insn, and recog is never called
again.
GCC 2.x did not seem to exhibit this kind of behavior.
In this particular instance, the variable allocated to the first REG RTX is
declared as a register variable, but GREG is trying to remap it into a local
on the stack. I don't know why it should try to do this. There are plenty
of open general-purpose registers avaiable for allocation. Again, this only
happens in 3.x; not 2.x.
I could possibly check for this in the output routines, but that would cause
all sorts of nasty stuff to happen. In order for me to process the above in
the output stage, I would have to set values in registers. However, these
registers could already be in use for other purposes, and I could end up
breaking register allocation.
I await your elucidation. Thank you for your help.
--Phil Brown
=================================================================
Some more information
---------------------
Source file: (GCC torture 920428-6.c)
-------------------------------------
typedef struct x
{
struct x *type;
struct x *chain;
struct x *value;
} *tree;
int
func (new, old)
register tree new, old;
{
if (old->type == 0 || new->type == 0)
{
register tree t = old->type;
if (t == 0)
t = new->type;
for (; t; t = t->chain )
if (t->value)
return 1;
}
return 0;
}
920428-6.c.00.rtl file (see insn 29)
---------------------------------------
;; Function func
(note 1 0 2 ("920428-6.c") 11)
(note 2 1 3 NOTE_INSN_DELETED)
(insn 3 2 4 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/f:SI 24 virtual-incoming-args)
(const_int -4 [0xfffffffc]))) -1 (nil)
(nil))
(insn 4 3 5 0x0 (set (reg/v/f:SI 30)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) -1 (nil)
(expr_list:REG_EQUIV (mem/f:SI (plus:SI (reg/f:SI 24
virtual-incoming-args)
(const_int -4 [0xfffffffc])) [0 new+0 S4 A32])
(nil)))
(insn 5 4 6 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/f:SI 24 virtual-incoming-args)
(const_int -8 [0xfffffff8]))) -1 (nil)
(nil))
(insn 6 5 7 0x0 (set (reg/v/f:SI 31)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) -1 (nil)
(expr_list:REG_EQUIV (mem/f:SI (plus:SI (reg/f:SI 24
virtual-incoming-args)
(const_int -8 [0xfffffff8])) [0 old+0 S4 A32])
(nil)))
(note 7 6 8 NOTE_INSN_FUNCTION_BEG)
(note 8 7 9 NOTE_INSN_DELETED)
(note 9 8 10 0x1002f3c0 NOTE_INSN_BLOCK_BEG)
(note 10 9 11 NOTE_INSN_DELETED)
(note 11 10 12 ("920428-6.c") 12)
(insn 12 11 13 0x0 (set (reg:PSI 33)
(truncate:PSI (reg/v/f:SI 31))) -1 (nil)
(nil))
(insn 13 12 14 0x0 (set (reg:SI 32)
(mem:SI (plus:PSI (reg:PSI 33)
(const_int 0 [0x0])) [0 S4 A8])) -1 (nil)
(nil))
(insn 14 13 15 0x0 (set (cc0)
(reg:SI 32)) -1 (nil)
(nil))
(jump_insn 15 14 16 0x0 (set (pc)
(if_then_else (eq (cc0)
(const_int 0 [0x0]))
(label_ref 22)
(pc))) -1 (nil)
(nil))
(insn 16 15 17 0x0 (set (reg:PSI 35)
(truncate:PSI (reg/v/f:SI 30))) -1 (nil)
(nil))
(insn 17 16 18 0x0 (set (reg:SI 34)
(mem:SI (plus:PSI (reg:PSI 35)
(const_int 0 [0x0])) [0 S4 A8])) -1 (nil)
(nil))
(insn 18 17 19 0x0 (set (cc0)
(reg:SI 34)) -1 (nil)
(nil))
(jump_insn 19 18 20 0x0 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 67)
(pc))) -1 (nil)
(nil))
(jump_insn 20 19 21 0x0 (set (pc)
(label_ref 22)) -1 (nil)
(nil))
(barrier 21 20 22)
(code_label 22 21 23 3 "" [0 uses])
(note 23 22 24 0x1002f390 NOTE_INSN_BLOCK_BEG)
(note 24 23 25 NOTE_INSN_DELETED)
(note 25 24 26 ("920428-6.c") 14)
(insn 26 25 27 0x0 (set (reg:PSI 37)
(truncate:PSI (reg/v/f:SI 31))) -1 (nil)
(nil))
(insn 27 26 28 0x0 (set (reg/v/f:SI 36)
(mem:SI (plus:PSI (reg:PSI 37)
(const_int 0 [0x0])) [0 S4 A8])) -1 (nil)
(nil))
(note 28 27 29 ("920428-6.c") 15)
(insn 29 28 30 0x0 (set (cc0)
(reg/v/f:SI 36)) -1 (nil)
(nil))
(jump_insn 30 29 31 0x0 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 34)
(pc))) -1 (nil)
(nil))
(note 31 30 32 ("920428-6.c") 16)
(insn 32 31 33 0x0 (set (reg:PSI 38)
(truncate:PSI (reg/v/f:SI 30))) -1 (nil)
(nil))
(insn 33 32 34 0x0 (set (reg/v/f:SI 36)
(mem:SI (plus:PSI (reg:PSI 38)
(const_int 0 [0x0])) [0 S4 A8])) -1 (nil)
(nil))
(code_label 34 33 35 4 "" [0 uses])
(insn 35 34 36 0x0 (const_int 0 [0x0]) -1 (nil)
(nil))
(note 36 35 37 ("920428-6.c") 17)
(note 37 36 38 NOTE_INSN_LOOP_BEG)
(code_label 38 37 39 5 "" [0 uses])
(insn 39 38 40 0x0 (set (cc0)
(reg/v/f:SI 36)) -1 (nil)
(nil))
(jump_insn 40 39 41 0x0 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 43)
(pc))) -1 (nil)
(nil))
(jump_insn 41 40 42 0x0 (set (pc)
(label_ref 65)) -1 (nil)
(nil))
(barrier 42 41 43)
(code_label 43 42 44 8 "" [0 uses])
(note 44 43 45 NOTE_INSN_LOOP_END_TOP_COND)
(note 45 44 46 ("920428-6.c") 18)
(insn 46 45 47 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/v/f:SI 36)
(const_int 8 [0x8]))) -1 (nil)
(nil))
(insn 47 46 48 0x0 (set (reg:SI 39)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) -1 (nil)
(nil))
(insn 48 47 49 0x0 (set (cc0)
(reg:SI 39)) -1 (nil)
(nil))
(jump_insn 49 48 50 0x0 (set (pc)
(if_then_else (eq (cc0)
(const_int 0 [0x0]))
(label_ref 56)
(pc))) -1 (nil)
(nil))
(note 50 49 51 ("920428-6.c") 19)
(note 51 50 52 NOTE_INSN_DELETED)
(note 52 51 53 NOTE_INSN_DELETED)
(insn 53 52 54 0x0 (set (reg:SI 29)
(const_int 1 [0x1])) -1 (nil)
(nil))
(jump_insn 54 53 55 0x0 (set (pc)
(label_ref 77)) -1 (nil)
(nil))
(barrier 55 54 56)
(code_label 56 55 57 9 "" [0 uses])
(note 57 56 58 ("920428-6.c") 17)
(note 58 57 59 NOTE_INSN_LOOP_CONT)
(code_label 59 58 60 7 "" [0 uses])
(insn 60 59 61 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/v/f:SI 36)
(const_int 4 [0x4]))) -1 (nil)
(nil))
(insn 61 60 62 0x0 (set (reg/v/f:SI 36)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) -1 (nil)
(nil))
(jump_insn 62 61 63 0x0 (set (pc)
(label_ref 38)) -1 (nil)
(nil))
(barrier 63 62 64)
(note 64 63 65 NOTE_INSN_LOOP_END)
(code_label 65 64 66 6 "" [0 uses])
(note 66 65 67 0x1002f390 NOTE_INSN_BLOCK_END)
(code_label 67 66 68 2 "" [0 uses])
(note 68 67 69 ("920428-6.c") 21)
(note 69 68 70 NOTE_INSN_DELETED)
(note 70 69 71 NOTE_INSN_DELETED)
(insn 71 70 72 0x0 (set (reg:SI 29)
(const_int 0 [0x0])) -1 (nil)
(nil))
(jump_insn 72 71 73 0x0 (set (pc)
(label_ref 77)) -1 (nil)
(nil))
(barrier 73 72 74)
(note 74 73 75 0x1002f3c0 NOTE_INSN_BLOCK_END)
(note 75 74 76 NOTE_INSN_FUNCTION_END)
(note 76 75 79 ("920428-6.c") 22)
(insn 79 76 80 0x0 (clobber (reg/i:SI 12 r12)) -1 (nil)
(nil))
(insn 80 79 77 0x0 (clobber (reg:SI 29)) -1 (nil)
(nil))
(code_label 77 80 78 1 "" [0 uses])
(insn 78 77 81 0x0 (set (reg/i:SI 12 r12)
(reg:SI 29)) -1 (nil)
(nil))
(insn 81 78 0 0x0 (use (reg/i:SI 12 r12)) -1 (nil)
(nil))
920428-6.c.24.greg
------------------------------------------------
;; Function func
Spilling for insn 4.
Using reg 2 for reload 0
Spilling for insn 6.
Using reg 2 for reload 0
Spilling for insn 12.
Using reg 2 for reload 0
Spilling for insn 16.
Using reg 2 for reload 0
Spilling for insn 26.
Using reg 2 for reload 0
Spilling for insn 27.
Using reg 2 for reload 0
Spilling for insn 32.
Using reg 2 for reload 0
Spilling for insn 33.
Using reg 2 for reload 0
Spilling for insn 46.
Using reg 2 for reload 0
Spilling for insn 53.
Using reg 2 for reload 0
Spilling for insn 60.
Using reg 2 for reload 0
Spilling for insn 61.
Using reg 2 for reload 0
Spilling for insn 71.
Using reg 2 for reload 0
Spilling for insn 78.
Reloads for insn # 4
Reload 0: reload_out (SI) = (reg/v/f:SI 30)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg/v/f:SI 30)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 6
Reload 0: reload_out (SI) = (reg/v/f:SI 31)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg/v/f:SI 31)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 12
Reload 0: reload_in (SI) = (reg/v/f:SI 31)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg/v/f:SI 31)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 16
Reload 0: reload_in (SI) = (reg/v/f:SI 30)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg/v/f:SI 30)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 26
Reload 0: reload_in (SI) = (reg/v/f:SI 31)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg/v/f:SI 31)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 27
Reload 0: reload_out (SI) = (reg/v/f:SI 36)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg/v/f:SI 36)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 32
Reload 0: reload_in (SI) = (reg/v/f:SI 30)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg/v/f:SI 30)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 33
Reload 0: reload_out (SI) = (reg/v/f:SI 36)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg/v/f:SI 36)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 46
Reload 0: reload_in (SI) = (reg/v/f:SI 36)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 0)
reload_in_reg: (reg/v/f:SI 36)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 53
Reload 0: reload_out (SI) = (reg:SI 29)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg:SI 29)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 60
Reload 0: reload_in (SI) = (reg/v/f:SI 36)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 0)
reload_in_reg: (reg/v/f:SI 36)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 61
Reload 0: reload_out (SI) = (reg/v/f:SI 36)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg/v/f:SI 36)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 71
Reload 0: reload_out (SI) = (reg:SI 29)
DATA_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
reload_out_reg: (reg:SI 29)
reload_reg_rtx: (reg:SI 2 r2)
Reloads for insn # 78
Reload 0: reload_in (SI) = (reg:SI 29)
DATA_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg:SI 29)
reload_reg_rtx: (reg/i:SI 12 r12)
;; Register dispositions:
32 in 2 33 in 17 34 in 2 35 in 17 37 in 17 38 in 17
39 in 2
;; Hard regs used: 2 12 14 17 19
(note 1 0 82 ("920428-6.c") 11)
;; Start of basic block 0, registers live: 14 [r14] 16 [sp]
(note 82 1 3 0 [bb 0] NOTE_INSN_BASIC_BLOCK)
(insn 3 82 4 0 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8]))) 10 {*islXMAC.md:779} (nil)
(nil))
(insn 4 3 99 0 0x0 (set (reg:SI 2 r2)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) 23 {*islXMAC.md:1144} (nil)
(expr_list:REG_EQUIV (mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 new+0 S4 A32])
(nil)))
(insn 99 4 5 0 0x0 (set (mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 new+0 S4 A32])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
(insn 5 99 6 0 0x0 (set (reg:PSI 19 xa)
(plus:PSI (reg/f:SI 14 r14)
(const_int -12 [0xfffffff4]))) 10 {*islXMAC.md:779} (nil)
(nil))
(insn 6 5 100 0 0x0 (set (reg:SI 2 r2)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) 23 {*islXMAC.md:1144} (nil)
(expr_list:REG_EQUIV (mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -12 [0xfffffff4])) [0 old+0 S4 A32])
(nil)))
(insn 100 6 7 0 0x0 (set (mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -12 [0xfffffff4])) [0 old+0 S4 A32])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
(note 7 100 11 0 NOTE_INSN_FUNCTION_BEG)
(note 11 7 101 0 ("920428-6.c") 12)
(insn 101 11 12 0 0x0 (set (reg:SI 2 r2)
(mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -12 [0xfffffff4])) [0 old+0 S4 A32])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 12 101 13 0 0x1002f3c0 (set (reg:PSI 17 ar1 [33])
(truncate:PSI (reg:SI 2 r2))) 95 {truncsipsi2} (nil)
(nil))
(insn 13 12 14 0 0x1002f3c0 (set (reg:SI 2 r2 [32])
(mem:SI (plus:PSI (reg:PSI 17 ar1 [33])
(const_int 0 [0x0])) [0 S4 A8])) 25 {*islXMAC.md:1166} (nil)
(nil))
(insn 14 13 15 0 0x1002f3c0 (set (cc0)
(reg:SI 2 r2 [32])) 60 {tstsi} (nil)
(nil))
(jump_insn 15 14 83 0 0x1002f3c0 (set (pc)
(if_then_else (eq (cc0)
(const_int 0 [0x0]))
(label_ref 22)
(pc))) 62 {beq} (nil)
(nil))
;; End of basic block 0, registers live:
14 [r14] 16 [sp] 30 31
;; Start of basic block 1, registers live: 14 [r14] 16 [sp] 30 31
(note 83 15 102 1 [bb 1] NOTE_INSN_BASIC_BLOCK)
(insn 102 83 16 1 0x0 (set (reg:SI 2 r2)
(mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 new+0 S4 A32])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 16 102 17 1 0x1002f3c0 (set (reg:PSI 17 ar1 [35])
(truncate:PSI (reg:SI 2 r2))) 95 {truncsipsi2} (nil)
(nil))
(insn 17 16 18 1 0x1002f3c0 (set (reg:SI 2 r2 [34])
(mem:SI (plus:PSI (reg:PSI 17 ar1 [35])
(const_int 0 [0x0])) [0 S4 A8])) 25 {*islXMAC.md:1166} (nil)
(nil))
(insn 18 17 19 1 0x1002f3c0 (set (cc0)
(reg:SI 2 r2 [34])) 60 {tstsi} (nil)
(nil))
(jump_insn 19 18 22 1 0x1002f3c0 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 67)
(pc))) 63 {bne} (nil)
(nil))
;; End of basic block 1, registers live:
14 [r14] 16 [sp] 30 31
;; Start of basic block 2, registers live: 14 [r14] 16 [sp] 30 31
(code_label 22 19 84 2 3 "" [1 uses])
(note 84 22 25 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 25 84 103 2 ("920428-6.c") 14)
(insn 103 25 26 2 0x0 (set (reg:SI 2 r2)
(mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -12 [0xfffffff4])) [0 old+0 S4 A32])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 26 103 27 2 0x1002f390 (set (reg:PSI 17 ar1 [37])
(truncate:PSI (reg:SI 2 r2))) 95 {truncsipsi2} (nil)
(nil))
(insn 27 26 104 2 0x1002f390 (set (reg:SI 2 r2)
(mem:SI (plus:PSI (reg:PSI 17 ar1 [37])
(const_int 0 [0x0])) [0 S4 A8])) 25 {*islXMAC.md:1166} (nil)
(nil))
(insn 104 27 28 2 0x0 (set (mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
(note 28 104 29 2 ("920428-6.c") 15)
(insn 29 28 30 2 0x1002f390 (set (cc0)
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])) 60 {tstsi} (nil)
(nil))
(jump_insn 30 29 31 2 0x1002f390 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 34)
(pc))) 63 {bne} (nil)
(nil))
;; End of basic block 2, registers live:
14 [r14] 16 [sp] 30 36
(note 31 30 86 ("920428-6.c") 16)
;; Start of basic block 3, registers live: 14 [r14] 16 [sp] 30
(note 86 31 105 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 105 86 32 3 0x0 (set (reg:SI 2 r2)
(mem/f:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 new+0 S4 A32])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 32 105 33 3 0x1002f390 (set (reg:PSI 17 ar1 [38])
(truncate:PSI (reg:SI 2 r2))) 95 {truncsipsi2} (nil)
(nil))
(insn 33 32 106 3 0x1002f390 (set (reg:SI 2 r2)
(mem:SI (plus:PSI (reg:PSI 17 ar1 [38])
(const_int 0 [0x0])) [0 S4 A8])) 25 {*islXMAC.md:1166} (nil)
(nil))
(insn 106 33 34 3 0x0 (set (mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
;; End of basic block 3, registers live:
14 [r14] 16 [sp] 36
;; Start of basic block 4, registers live: 14 [r14] 16 [sp] 36
(code_label 34 106 87 4 4 "" [1 uses])
(note 87 34 35 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
(insn 35 87 36 4 0x1002f390 (const_int 0 [0x0]) 11 {nop} (nil)
(nil))
;; End of basic block 4, registers live:
14 [r14] 16 [sp] 36
(note 36 35 37 ("920428-6.c") 17)
(note 37 36 38 NOTE_INSN_LOOP_BEG)
;; Start of basic block 5, registers live: 14 [r14] 16 [sp] 36
(code_label 38 37 88 5 5 "" [1 uses])
(note 88 38 39 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
(insn 39 88 40 5 0x1002f390 (set (cc0)
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])) 60 {tstsi} (nil)
(nil))
(jump_insn 40 39 89 5 0x1002f390 (set (pc)
(if_then_else (ne (cc0)
(const_int 0 [0x0]))
(label_ref 43)
(pc))) 63 {bne} (nil)
(nil))
;; End of basic block 5, registers live:
14 [r14] 16 [sp] 36
;; Start of basic block 6, registers live: 14 [r14] 16 [sp]
(note 89 40 41 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
(jump_insn 41 89 42 6 0x1002f390 (set (pc)
(label_ref 67)) 72 {jump} (nil)
(nil))
;; End of basic block 6, registers live:
14 [r14] 16 [sp]
(barrier 42 41 43)
;; Start of basic block 7, registers live: 14 [r14] 16 [sp] 36
(code_label 43 42 90 7 8 "" [1 uses])
(note 90 43 45 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
(note 45 90 107 7 ("920428-6.c") 18)
(insn 107 45 46 7 0x0 (set (reg:SI 2 r2)
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 46 107 47 7 0x1002f390 (set (reg:PSI 19 xa)
(plus:PSI (reg:SI 2 r2)
(const_int 8 [0x8]))) 10 {*islXMAC.md:779} (nil)
(nil))
(insn 47 46 48 7 0x1002f390 (set (reg:SI 2 r2 [39])
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) 23 {*islXMAC.md:1144} (nil)
(nil))
(insn 48 47 49 7 0x1002f390 (set (cc0)
(reg:SI 2 r2 [39])) 60 {tstsi} (nil)
(nil))
(jump_insn 49 48 50 7 0x1002f390 (set (pc)
(if_then_else (eq (cc0)
(const_int 0 [0x0]))
(label_ref 59)
(pc))) 62 {beq} (nil)
(nil))
;; End of basic block 7, registers live:
14 [r14] 16 [sp] 36
(note 50 49 91 ("920428-6.c") 19)
;; Start of basic block 8, registers live: 14 [r14] 16 [sp]
(note 91 50 53 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
(insn 53 91 108 8 0x1002f390 (set (reg:SI 2 r2)
(const_int 1 [0x1])) 28 {*islXMAC.md:1237} (nil)
(nil))
(insn 108 53 54 8 0x0 (set (mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -4 [0xfffffffc])) [0 S4 A8])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
(jump_insn 54 108 55 8 0x1002f390 (set (pc)
(label_ref 77)) 72 {jump} (nil)
(nil))
;; End of basic block 8, registers live:
14 [r14] 16 [sp] 29
(barrier 55 54 57)
(note 57 55 58 ("920428-6.c") 17)
(note 58 57 59 NOTE_INSN_LOOP_CONT)
;; Start of basic block 10, registers live: 14 [r14] 16 [sp] 36
(code_label 59 58 93 10 7 "" [1 uses])
(note 93 59 109 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
(insn 109 93 60 10 0x0 (set (reg:SI 2 r2)
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 60 109 61 10 0x1002f390 (set (reg:PSI 19 xa)
(plus:PSI (reg:SI 2 r2)
(const_int 4 [0x4]))) 10 {*islXMAC.md:779} (nil)
(nil))
(insn 61 60 110 10 0x1002f390 (set (reg:SI 2 r2)
(mem:SI (reg:PSI 19 xa) [0 S4 A8])) 23 {*islXMAC.md:1144} (nil)
(nil))
(insn 110 61 62 10 0x0 (set (mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -8 [0xfffffff8])) [0 t S4 A8])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
(jump_insn 62 110 63 10 0x1002f390 (set (pc)
(label_ref 38)) 72 {jump} (nil)
(nil))
;; End of basic block 10, registers live:
14 [r14] 16 [sp] 36
(barrier 63 62 64)
(note 64 63 67 NOTE_INSN_LOOP_END)
;; Start of basic block 12, registers live: 14 [r14] 16 [sp]
(code_label 67 64 95 12 2 "" [2 uses])
(note 95 67 68 12 [bb 12] NOTE_INSN_BASIC_BLOCK)
(note 68 95 71 12 ("920428-6.c") 21)
(insn 71 68 111 12 0x1002f3c0 (set (reg:SI 2 r2)
(const_int 0 [0x0])) 28 {*islXMAC.md:1237} (nil)
(nil))
(insn 111 71 75 12 0x0 (set (mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -4 [0xfffffffc])) [0 S4 A8])
(reg:SI 2 r2)) 99 {*islXMAC.md:3903} (nil)
(nil))
;; End of basic block 12, registers live:
14 [r14] 16 [sp] 29
(note 75 111 76 NOTE_INSN_FUNCTION_END)
(note 76 75 77 ("920428-6.c") 22)
;; Start of basic block 13, registers live: 14 [r14] 16 [sp] 29
(code_label 77 76 97 13 1 "" [1 uses])
(note 97 77 112 13 [bb 13] NOTE_INSN_BASIC_BLOCK)
(insn 112 97 78 13 0x0 (set (reg/i:SI 12 r12)
(mem:SI (plus:SI (reg/f:SI 14 r14)
(const_int -4 [0xfffffffc])) [0 S4 A8])) 103
{*islXMAC.md:3950} (nil)
(nil))
(insn 78 112 81 13 0x1002f3f0 (set (reg/i:SI 12 r12)
(reg/i:SI 12 r12)) 28 {*islXMAC.md:1237} (nil)
(nil))
(insn 81 78 98 13 0x1002f3f0 (use (reg/i:SI 12 r12)) -1 (nil)
(nil))
;; End of basic block 13, registers live:
12 [r12] 14 [r14] 16 [sp]
(note 98 81 0 NOTE_INSN_DELETED)
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