IEEE extended real formats

[Robert Dewar]

Zack Weinberg wrote:

> For the ia64, this is expected to be embedded in an 128-bit memory
> block with all the padding at higher addresses, in *both*
> endiannesses:
> 
>    SEEE MMMM MMMM MMMM MMMM 0000 0000 0000
>    MMMM MMMM MMMM MMMM ESSS 0000 0000 0000
> 
> What I'm not clear on is where the x86 expects the padding.  The
> manuals, even the most recent, simply say "extended-real values are
> stored in 10 consecutive bytes."  But this is always embedded in an
> 12- or 16-byte block, so I do not know what to do.  Can anyone
> comment?

The x86 is identical to the ia64 in little endian (there is no
big endian in the x86 case certainly!) the padding is not seen
by the processor, since it is after the 10 bytes that are relevant.
> 
> zw