How to enable instruction scheduling?

[Balaji S]

Hi all,
I am working on a 16bit DSP which can issue two instructions in one cycle.

To know more about DFA scheduling in GCC, I decided to take a simple RISC (stormy16) port and modify that to have the above feature.

I studied DFA scheduling description from the existing target ports and written the behavioral description (DFA) for my new target. With this DFA description alone i am not getting the scheduled output. I am not getting debug dumps using -dS and -dR too.

Seems more actions required to get VLIW like bundeled instructions?

Please, help in this.

Thanks in advance,
Balaji Sivan