assign_parm_setup_block handling of parallels

[Aldy Hernandez]

On Thu, Dec 23, 2004 at 11:10:26PM +0100, Eric Botcazou wrote:
> > In my limited understanding of the problem I think we can allow the
> > optimization for one-member parallels iff the hard register will span
> > more than one register.  I think this will satisfy both PPC64 and
> > Sparc64.
> 
> SPARC64 :-)
> 
> > Do you folks agree?
> 
> I don't understand what you're trying to optimize: what's the problem with
> 
> (parallel:DF [
>         (expr_list:REG_DEP_TRUE (reg:DI 3 3)
>             (const_int 0 [0x0]))
>     ])
> 
> for your port?  Does (reg:DI 3 3) not span consecutive regs?

Yes, it spans r3 and r4.

> IIRC the optimization was precisely aimed at multi-member parallels, as 
> indicated in the comment.

We're changing the port to emit:
	(parallel:DF (expr_list (reg:DI 3)))

instead of:

	(parallel:DF (expr_list (reg:SI 3) (reg:SI 4)))

because of the plethory of subregs and bad code GCC generates.

Aldy