RFC: Improve MIPS code generation.

[Alexandre Oliva]

On Oct  3, 2003, David Daney <ddaney@avtrex.com> wrote:

> But the compiler can (and does) move the load of the JALR target
> register away from the JALR, which would make it very difficult for
> the linker to convert it into a BAL.

That's why mips has a JALR relocation that is attached to the call
instruction.  We even have linker relaxation code that turns it into a
branch, but t9 still gets set, as mandated by the ABI.  It possibly
wouldn't be too hard to check whether the address being branched to
matches the sequence that initializes $gp from $t9 (scheduling might
have changed it), and then branch to the instruction right after that,
as long as the $gp value is known to be the same (think multigot).

-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                 aoliva@{redhat.com, gcc.gnu.org}
CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist                Professional serial bug killer