RFC: Improve MIPS code generation.

[David Daney]

Daniel Jacobowitz wrote:

>On Fri, Oct 03, 2003 at 03:13:04PM -0700, David Daney wrote:
>  
>
>>Recently I have been thinking about gcc's code generation especially
>>WRT the MIPS o32 ABI, but I think that the ideas might be relevant to
>>other architectures as well.
>>
>>I am not quite sure how to implement this, but wanted to get feedback.
>>    
>>
>
>FYI, Alpha already implements this.  It's done more effectively as a
>linker optimization and takes a fair bit of code.
>
>  
>
But the compiler can (and does) move the load of the JALR target 
register away from the JALR, which would make it very difficult for the 
linker to convert it into a BAL.