md description for intruction that modifies multiple operands

Fred Fish fnf@intrinsity.com
Thu May 29 18:03:00 GMT 2003


> However, I'm not clear on whether or not the template guarantees that
> the register allocation will be sequential.  I suspect not.  So we may
> still have the problem of training the register allocator to ensure
> that the operands to the block4.m instruction are always some
> sequential set of four registers out of the possible 16 (m0-m15).

OK, I answered this myself by trying the example code:

  typedef int matrix_t __attribute__((__mode__(V16SI)));

  matrix_t foo (matrix_t t0, matrix_t t1, matrix_t t2, matrix_t t3)
  {
    __BLOCK4_M (t0, t1, t2, t3);
    __BLOCK4_M (t3, t2, t1, t0);
    return (t0);
  }

which generated:

foo:
        block4.m        $m0,$m1,$m2,$m3
        j       $31
        block4.m        $m3,$m2,$m1,$m0

when what it needed to do was to shuffle the contents of m0 through m3
out of the first block4 into a new set of registers, or the same set
using a temporary and some register swaps.

Oh well.  This is still a huge improvement over our first cut, which
uses an ugly set of intermediate instructions that do vector
concatenations to get a V64SI type for the unspec for block4 (which
then takes just one V64SI operand), and then a bunch more vector
splits to pick the result apart as needed.  The register allocator
does know to put a V64SI type in four sequential matrix registers,
each of which holds an V16SI type.

-Fred



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