Different addressing modes?

[Ulrich Weigand]

Fred Cook wrote:

>I am still trying to get addressing modes correctly in my port. 
>Basically my architecture has the following addressing modes:
> 
> 1) absolute
> 2) register indirect
> 3) register + offset
> 4) register + register

I'm assuming this means the following RTX represent valid 
memory operands:

 1)  (mem (symbol_ref ...))
 2)  (mem (reg ...))
 3)  (mem (plus (reg ...) (const_int ...)))
 4)  (mem (plus (reg ...) (reg ...)))

>I want to specify in my define_insn for "call" that 1+2 are allowed 
>and in my define_insn for "movsi" that 2, 3, and 4 are allowed for 
>loads and 2 and 3 for stores.

"call" can be handled specially.  It is fine to have a pattern
that matches
  (call (mem (symbol_ref ...))
even if (mem (symbol_ref ...)) is not a valid memory operand.

I would suggest to do the following:

- Define GO_IF_LEGITIMATE_ADDRESS so that 2), 3), and 4) above
  are accepted.  This means that usual memory accesses (i.e.
  those for loads) simply use the "m" constraint.

- Define an additional constraint letter "S" to denote
  'memory reference without a second register', and define
  EXTRA_CONSTRAINTS to only accept 2) and 3) above for
  this letter.

  As this definition fulfils the requirements "a subset of
  all memory references including all those consisting of
  solely a base register", you can (and must) mark the
  constraint letter "S" as EXTRA_MEMORY_CONSTRAINT.  This
  will cause reload to fix up the address if required
  (note that you *must* provide a load-address type pattern
  that accepts the full range of memory addresses as source).

With this set up, you can define movsi like this:

(define_insn "movsi"
       [(set (match_operand:SI 0 "nonimmediate_operand" "=r,S")
             (match_operand:SI 1 "general_operand" "m,r"))]
       ""
       "@
         ld %1 -> %0
         st %0 %1"
)

All this is actually similar to the s390 setup, so you
might want to check out our backend for comparison ... 
 
Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  weigand@informatik.uni-erlangen.de