How to fill delay slot for a VLIW target?

[Michael Meissner]

On Wed, Jun 11, 2003 at 05:43:58PM +0800, Jeff Chen wrote:
> i am porting GCC for a VLIW target, the target has six slots, it can 
> issue at most 6 insns in one cycle. the branch, and call insn requires a 
> delay slot of one VLIW bundle. i want to use define_delay to handle 
> filling of delay slot. but define_delay can only describe insns which 
> need a FIXED number of delay slots, in my case, the number of insns in 
> the delay slot (which forms a VLIW bundle) may VARY.

Bear in mind that that the average delay slot is 1 instruction for classical
RISC machines like Sparc, MIPS, etc.  I'm not sure how well multiple insns work
in practice.  I recall thinking it might be an issue when I was looking at
doing the D30V, but I don't think I ever did delay slots for the machine.

> it seems that GCC schedules delay slot on the basis of insn, not on VLIW 
> bundle, so is it possible to use define_delay for such a VLIW target?

Probably, but you will be in for some hacking.  I've thought for the last few
years that a separate delay slot pass is an anachronism to when the scheduler
was fairly wimpy, and that the scheduler should really do delay slots as part
of its normal work.  Since most of the new machines didn't have delay slots, it
was hard to convince myself and management that it was worthwhile to spend lots
of time on.

-- 
Michael Meissner
email: gnu@the-meissners.org
http://www.the-meissners.org