[tree-ssa] RFC: Never gimplify ASM_EXPRs

[Diego Novillo]

On Thu, 2003-06-05 at 11:52, Jason Merrill wrote:
> On Thu, 05 Jun 2003 11:12:36 -0400, Jason Merrill <jason@redhat.com> wrote:
> 
> > Andrew and I discussed this issue at the summit, and agreed (I thought)
> > that the asm should either make the operand an input/output operand or pass
> > in X and do the dereference in the explicit assembly.
> 
> Thus:
> 
> 
> ______________________________________________________________________
> 
> *** boehm-gc/include/private/gcconfig.h.~1~	2003-05-07 11:14:51.000000000 -0400
> --- boehm-gc/include/private/gcconfig.h	2003-06-05 11:50:33.000000000 -0400
> ***************
> *** 973,979 ****
>   #       endif
>   #	ifdef USE_I686_PREFETCH
>   #	  define PREFETCH(x) \
> ! 	    __asm__ __volatile__ ("	prefetchnta	%0": : "m"(*(char *)(x)))
>   	    /* Empirically prefetcht0 is much more effective at reducing	*/
>   	    /* cache miss stalls for the targetted load instructions.  But it	*/
>   	    /* seems to interfere enough with other cache traffic that the net	*/
> --- 973,979 ----
>   #       endif
>   #	ifdef USE_I686_PREFETCH
>   #	  define PREFETCH(x) \
> ! 	    __asm__ __volatile__ ("	prefetchnta	(%0)": : "r"((char *)(x)))
>   	    /* Empirically prefetcht0 is much more effective at reducing	*/
>   	    /* cache miss stalls for the targetted load instructions.  But it	*/
>   	    /* seems to interfere enough with other cache traffic that the net	*/
> ***************
> *** 982,995 ****
>   	    /* Using prefetches for write seems to have a slight negative	*/
>   	    /* impact on performance, at least for a PIII/500.			*/
>   #	    define PREFETCH_FOR_WRITE(x) \
> ! 	      __asm__ __volatile__ ("	prefetcht0	%0": : "m"(*(char *)(x)))
>   #	  endif
>   #	endif
>   #	ifdef USE_3DNOW_PREFETCH
>   #	  define PREFETCH(x) \
> ! 	    __asm__ __volatile__ ("	prefetch	%0": : "m"(*(char *)(x)))
>   #	  define PREFETCH_FOR_WRITE(x) \
> ! 	    __asm__ __volatile__ ("	prefetchw	%0": : "m"(*(char *)(x)))
>   #	endif
>   #   endif
>   #   ifdef CYGWIN32
> --- 982,995 ----
>   	    /* Using prefetches for write seems to have a slight negative	*/
>   	    /* impact on performance, at least for a PIII/500.			*/
>   #	    define PREFETCH_FOR_WRITE(x) \
> ! 	      __asm__ __volatile__ ("	prefetcht0	(%0)": : "r"((char *)(x)))
>   #	  endif
>   #	endif
>   #	ifdef USE_3DNOW_PREFETCH
>   #	  define PREFETCH(x) \
> ! 	    __asm__ __volatile__ ("	prefetch	(%0)": : "r"((char *)(x)))
>   #	  define PREFETCH_FOR_WRITE(x) \
> ! 	    __asm__ __volatile__ ("	prefetchw	(%0)": : "r"((char *)(x)))
>   #	endif
>   #   endif
>   #   ifdef CYGWIN32
>
Well, this doesn't fix the problem.  We get the same number of
regressions in libjava.  The problem is that we break appart the
ASM_EXPR operand into 

fubar (x)
{
  char * x.1;
  char T.2;

  x.1 = (char *)x;
  T.2 = *x.1;
   __asm__ __volatile__("       prefetch        %0"::"r" T.2);
}

So the generated code prefetch instruction never references 'x' as it
originally intended to.


Diego.