personally, I think this is a good idea. And the work depends on the familiarity with instruction set and analysis of assembler program.
Peephole optimization is one that deal with special instruction sequence or pattern.So the first task is finding the power instruction
sequence.
To: gcc@gcc.gnu.org
cc: (bcc: Qinfeng Zhang/SHA/RESEARCH/PHILIPS)
Subject: Optimizing for Low Power Consumption
Christopher Wolff Classification:
<cwolff@cs.uml.edu>
Sent by:
gcc-owner@gcc.gnu.org
2003-06-04 03:49
Greetings,
I'm working on a research project concerned with reducing the power
consumption of programs running on embedded systems. The m68hc11 is one
of the chips we are working with. I would like to modify gcc's backend
for this target to select the instructions with the lowest cost in terms
of power consumption. It seems that this could be implemented using
peephole optimization.
As someone who is unfamiliar with the internals of gcc, can anyone tell me
what the scope of this project would be, and if it is a realistic goal for
a short-term summer project?
Thanks in advance,
Christopher M. Wolff
Graduate Student
Department of Computer Science
University of Massachusetts Lowell