Optimizing for Low Power Consumption

[Christopher Wolff]

On Tue, 3 Jun 2003, Peter Barada wrote:

> >I'm working on a research project concerned with reducing the power 
> >consumption of programs running on embedded systems.  The m68hc11 is one 
> >of the chips we are working with.  I would like to modify gcc's backend 
> >for this target to select the instructions with the lowest cost in terms 
> >of power consumption.  It seems that this could be implemented using 
> >peephole optimization.
> >
> >As someone who is unfamiliar with the internals of gcc, can anyone tell me 
> >what the scope of this project would be, and if it is a realistic goal for 
> >a short-term summer project?
> 
> Before anyone can even try to scope this, it would help immeasurably
> to provide some examples of what's a high-power instruction sequence, and
> then its equivalent low-power instruction sequence.  Then we might be
> able to suggest an approach you could use.  The more sequences you
> provide, the better we can make suggestions.

For instance, the instruction 

ADDD m     ; add to 16-bit register D

will be more expensive than using the two instructions

ADDB m+1   ; accumulators A & B are the high and low order bytes of D
ADCA m     ; add with carry

for all addressing modes except Indexed Y, sometimes twice as expensive.  
The same is true for subtraction.  

For loading we have found that

LDD m

will generally be less expensive than the sequence

LDAB m+1
LDAA m

except in Indexed X addressing mode, where it is nearly twice as 
costly.

Storing is similar:

STD m

will be less expensive than

STAB m+1
STAA m

for all addressing modes.

Also, on the average, instructions using the B accumulator will consume 
less power than the A accumulator, except in Indexed X addessing mode.

We have compiled a profile of the instruction set that includes the 
average energy cost to execute each instruction...

> As for dealing with the internals of gcc, Read the manual; it will
> make your life much easier....

I've been reading it, and I've found it very helpful.  It seems that these 
optimizations could mostly be implemented by modifying the machine 
descriptor file for the 68hc11?  Any comments would be appreciated.


--
Christopher M. Wolff

Graduate Student
Department of Computer Science
University of Massachusetts Lowell