Loop optimizer issues

Zdenek Dvorak rakdver@atrey.karlin.mff.cuni.cz
Tue Jul 29 21:06:00 GMT 2003


Hello,

> > I've been thinking about this proposal and I am not convinced that it
> > would be a good idea to merge the two branches.
> > 
> >       * The tree-ssa branch is primarily trying to replace RTL passes. 
> >         This may include the loop optimizer.  So far, it is not clear
> >         whether we will actually need to have a sophisticated loop
> >         optimizer at the RTL level (if at all).  The only thing that
> >         comes to mind that may needed from RTL are:
> >               * instruction lengths/costs to guide the unroller
> >               * prefetching capabilities and memory costs to guide
> >                 software pipelining and memory hierarchy optimizations.
> 
> We do BIV-to-GIV conversion and some addressing mode selection in the RTL
> loop optimizer. This is critical for targets such as the SH.

this is done by the new rtl-level optimizer.  The support probably is
not flawless, but if you encounter some problems and provide me with
more details, I am fairly confident I am able to fix them quickly.

Zdenek



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