gcc-3.3 problem with reloading byte into address register on ColdFire

[Jim Wilson]

Looking at a m68k manual, I see that no member of the m68k family
supports QImode moves to/from address registers.  This isn't a Coldfire
specific problem.  If you look at output_move_qimode, it always uses a
word-sized (HImode) move if the source or destination is an address
register.  So my initial analysis was wrong.

I also forgot that mov* patterns are special.  They always have to work,
since they are want reload emits when it has an instruction that needs
fixing.  So if we wanted to get around the problem of not having QImode
moves, then we would need to use secondary reloads and a
reload_{in,out}qi pattern to make this work.  However, we apparently do
have QImode moves, so I need to look at this again.

This appears to be a much more subtle problem than I originally
thought.  I see that the Coldfire addsi3 pattern accepts "r" as a
destination, whereas the non-Coldfire one accepts "d,a".  It looks like
the a/T alternative was deleted for coldfire, and then the d and a
destination alternatives were combined because they were identical. 
However, this has the side effect of making a equally preferable to d,
which it is not.  I suggest splitting r back into d,a and see if that
helps.  That should cause us to prefer 'd' registers.  There may be
other patterns that have similar problems that may also need to be
fixed.

There is also the choice of implementing secondary reloads and a
reload_outqi pattern which should also work.

Jim