trouble with porting architecture

[tm_gccmail@kloo.net]

On Tue, 30 Dec 2003, Eric Botcazou wrote:

> > One common work around on that processor is to consider a few locations
> > in page zero (first 256 bytes of memory) as fake 16-bit registers (one or
> > two), since these locations are relatively cheap to load/store.
> 
> Thanks for the tip.  However, this won't work for any architectures based on
> the MC6809: for example, on the Thomson architecture (old French computer
> series), page 0 is mapped to the ROM cartridge :-)
> 
> --
> Eric Botcazou

"Page zero" is an implementation artifact on the 6502 and derivatives
where addresses in the first 256 bytes can be accessed via a two-byte
instruction rather than a three-byte instruction.

This feature is specific to the 6502 and is not a generally supported
feature on 8-bit processors.

So using "page zero" only has an advantage on the 6502.

Toshi