Can't bootstrap on Linux/ia64

H. J. Lu hjl@lucon.org
Fri Apr 18 09:21:00 GMT 2003


On Thu, Apr 17, 2003 at 09:58:46AM -0700, H. J. Lu wrote:
> Since 4/16, I couldn't bootstrap mainline on Linux/ia64. I got
> 
> stage1/xgcc -Bstage1/ -B/usr/gcc-3.4/ia64-unknown-linux-gnu/bin/ -c   -g -O2
> -DIN_GCC   -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes
> -pedantic -Wno-long-long -Werror    -DHAVE_CONFIG_H -DGENERATOR_FILE    -I. -I.
> -I/net/gnu/export/gnu/src/gcc/gcc/gcc -I/net/gnu/export/gnu/src/gcc/gcc/gcc/.
> -I/net/gnu/export/gnu/src/gcc/gcc/gcc/config
> -I/net/gnu/export/gnu/src/gcc/gcc/gcc/../include
> /net/gnu/export/gnu/src/gcc/gcc/gcc/gengenrtl.c -o gengenrtl.o
> stage1/xgcc -Bstage1/ -B/usr/gcc-3.4/ia64-unknown-linux-gnu/bin/   -g -O2
> -DIN_GCC   -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes
> -pedantic -Wno-long-long -Werror    -DHAVE_CONFIG_H -DGENERATOR_FILE  -o
> gengenrtl \
>  gengenrtl.o ../libiberty/libiberty.a
> gengenrtl.o(.text+0xa1): In function `type_from_format':
> /net/gnu/export/gnu/src/gcc/gcc/gcc/gengenrtl.c:65: relocation truncated to
> fit: GPREL22 .text
> gengenrtl.o(.text+0xe1):/net/gnu/export/gnu/src/gcc/gcc/gcc/gengenrtl.c:65:
> relocation truncated to fit: GPREL22 .text
> gengenrtl.o(.text+0x141):/net/gnu/export/gnu/src/gcc/gcc/gcc/gengenrtl.c:65:
> relocation truncated to fit: GPREL22 .text
> 
> 4/16 is ok.
> 

I checked the asm output between gcc 3.4 20030415 and 3.4 20030417.
Here is the diff for gengenrtl.c. It looks like the new gcc no longer
generates ldxmov/ltoff22x in certain cases. It doesn't look right to
me. Is that intentional?

BTW, there may be a small ldxmov/ltoff22x ld bug. Shouldn't we relax
ldxmov/ltoff22x after we finish all brl relaxation? I have a patch for
that.

H.J.
--- bad.s	Thu Apr 17 21:53:49 2003
+++ good.s	Thu Apr 17 21:53:39 2003
@@ -1830,12 +1830,13 @@ type_from_format:
 	br.ret.sptk.many b0
 	;;
 .L8:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC395), r1
 	nop 0
-	addl r8 = @gprel(.LC395), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC395
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
@@ -1851,12 +1852,13 @@ type_from_format:
 	br.ret.sptk.many b0
 	;;
 .L3:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC391), r1
 	nop 0
-	addl r8 = @gprel(.LC391), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC391
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
@@ -1883,12 +1885,13 @@ type_from_format:
 	br.ret.sptk.many b0
 	;;
 .L7:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC394), r1
 	nop 0
-	addl r8 = @gprel(.LC394), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC394
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
@@ -2035,82 +2038,90 @@ accessor_from_format:
 	br.call.sptk.many b0 = abort#
 	;;
 .L25:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC406), r1
 	nop 0
-	addl r8 = @gprel(.LC406), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC406
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L22:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC403), r1
 	nop 0
-	addl r8 = @gprel(.LC403), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC403
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L23:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC404), r1
 	nop 0
-	addl r8 = @gprel(.LC404), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC404
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L17:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC399), r1
 	nop 0
-	addl r8 = @gprel(.LC399), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC399
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L19:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC401), r1
 	nop 0
-	addl r8 = @gprel(.LC401), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC401
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L24:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC405), r1
 	nop 0
-	addl r8 = @gprel(.LC405), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC405
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L21:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC402), r1
 	nop 0
-	addl r8 = @gprel(.LC402), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC402
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	;;
 .L18:
-	.mmi
+	.mfi
+	addl r8 = @ltoffx(.LC400), r1
 	nop 0
-	addl r8 = @gprel(.LC400), gp
 	mov b0 = r33
+	;;
 	.mib
-	nop 0
+	ld8.mov r8 = [r8], .LC400
 	mov ar.pfs = r34
 	br.ret.sptk.many b0
 	.endp accessor_from_format#
@@ -2144,8 +2155,8 @@ special_format:
 	nop 0
 	mov r1 = r36
 	.mmb
-	cmp.ne p6, p7 = 0, r8
 	mov r37 = r32
+	cmp.ne p6, p7 = 0, r8
 	(p7) br.cond.dpnt .L33
 .L31:
 	.mfb
@@ -2246,11 +2257,12 @@ special_rtx:
 	(p6) br.cond.dptk .L36
 	;;
 	.mmb
+	addl r38 = @ltoffx(.LC186), r1
+	ld8 r37 = [r32]
 	nop 0
-	addl r38 = @gprel(.LC186), gp
-	nop 0
+	;;
 	.mfb
-	ld8 r37 = [r32]
+	ld8.mov r38 = [r38], .LC186
 	nop 0
 	br.call.sptk.many b0 = memcmp#
 	;;
@@ -2264,11 +2276,12 @@ special_rtx:
 	(p6) br.cond.dptk .L36
 	;;
 	.mmb
+	addl r38 = @ltoffx(.LC191), r1
+	ld8 r37 = [r32]
 	nop 0
-	addl r38 = @gprel(.LC191), gp
-	nop 0
+	;;
 	.mfb
-	ld8 r37 = [r32]
+	ld8.mov r38 = [r38], .LC191
 	nop 0
 	br.call.sptk.many b0 = memcmp#
 	;;
@@ -2282,11 +2295,12 @@ special_rtx:
 	(p6) br.cond.dptk .L36
 	;;
 	.mmb
+	addl r38 = @ltoffx(.LC198), r1
+	ld8 r37 = [r32]
 	nop 0
-	addl r38 = @gprel(.LC198), gp
-	nop 0
+	;;
 	.mfb
-	ld8 r37 = [r32]
+	ld8.mov r38 = [r38], .LC198
 	nop 0
 	br.call.sptk.many b0 = memcmp#
 	;;
@@ -2644,9 +2658,14 @@ gendecl:
 	cmp4.eq p6, p7 = 0, r14
 	(p7) br.cond.dptk .L71
 .L67:
-	.mii
-	addl r32 = @gprel(.LC411), gp
+	.mfi
+	addl r32 = @ltoffx(.LC411), r1
+	nop 0
 	mov b0 = r36
+	.mmi
+	nop 0
+	;;
+	ld8.mov r32 = [r32], .LC411
 	mov ar.pfs = r37
 	;;
 	.mfb
@@ -2745,29 +2764,33 @@ genmacro:
 	shladd r33 = r32, 1, r32
 	br.call.sptk.many b0 = special_rtx#
 	;;
-	.mmb
+	.mmi
 	cmp4.eq p6, p7 = 0, r8
 	ld8.mov r35 = [r35], defs#
-	nop 0
-	.mmi
 	mov r1 = r38
 	;;
+	.mmi
 	shladd r33 = r33, 3, r35
 	addl r39 = @ltoffx(.LC412), r1
-	.mii
-	(p7) addl r40 = @gprel(.LC413), gp
-	(p6) addl r40 = @gprel(.LC164), gp
+	(p6) addl r40 = @ltoffx(.LC164), r1
+	.mmi
+	(p7) addl r40 = @ltoffx(.LC413), r1
 	;;
+	ld8 r41 = [r33], 16
 	nop 0
 	.mmb
-	ld8 r41 = [r33], 16
 	ld8.mov r39 = [r39], .LC412
+	(p6) ld8.mov r40 = [r40], .LC164
+	nop 0
+	.mmb
+	(p7) ld8.mov r40 = [r40], .LC413
+	nop 0
 	br.call.sptk.many b0 = printf#
 	;;
-	.mmb
-	mov r1 = r38
-	ld8 r33 = [r33]
+	.mmi
 	nop 0
+	ld8 r33 = [r33]
+	mov r1 = r38
 	;;
 .L92:
 	.mmi
@@ -2782,17 +2805,18 @@ genmacro:
 	(p6) br.cond.dpnt .L89
 	;;
 .L95:
-	.mfi
+	.mmb
+	addl r39 = @ltoffx(.LC414), r1
 	mov r40 = r34
 	nop 0
-	cmp4.eq p6, p7 = 48, r14
 	.mmb
+	cmp4.eq p6, p7 = 48, r14
 	adds r33 = 1, r33
-	addl r39 = @gprel(.LC414), gp
 	(p6) br.cond.dpnt .L92
-	.mfb
+	;;
+	.mib
+	ld8.mov r39 = [r39], .LC414
 	adds r34 = 1, r34
-	nop 0
 	br.call.sptk.many b0 = printf#
 	;;
 	.mmb
@@ -2877,9 +2901,14 @@ genmacro:
 	nop 0
 	(p7) br.cond.dptk .L96
 .L91:
-	.mii
-	addl r32 = @gprel(.LC417), gp
+	.mfi
+	addl r32 = @ltoffx(.LC417), r1
+	nop 0
 	mov b0 = r36
+	.mmi
+	nop 0
+	;;
+	ld8.mov r32 = [r32], .LC417
 	mov ar.pfs = r37
 	;;
 	.mfb
@@ -2980,11 +3009,15 @@ gendef:
 	(p6) br.cond.dpnt .L115
 	.mii
 	adds r33 = 1, r33
+	addl r39 = @ltoffx(.LC419), r1
 	mov r40 = r34
-	addl r39 = @gprel(.LC419), gp
 	;;
-	.mbb
+	.mmf
 	cmp4.eq p6, p7 = 48, r14
+	ld8.mov r39 = [r39], .LC419
+	nop 0
+	.bbb
+	nop 0
 	(p6) br.cond.dpnt .L120
 	br.call.sptk.many b0 = printf#
 	;;
@@ -3050,13 +3083,18 @@ gendef:
 	br .L121
 	;;
 .L117:
-	.mmb
-	addl r39 = @gprel(.LC422), gp
-	mov r33 = r32
+	.mfi
+	addl r39 = @ltoffx(.LC422), r1
 	nop 0
-	.mmb
+	mov r33 = r32
+	.mii
 	mov r35 = r0
 	mov r34 = r0
+	;;
+	nop 0
+	.mfb
+	ld8.mov r39 = [r39], .LC422
+	nop 0
 	br.call.sptk.many b0 = puts#
 	;;
 	.mii
@@ -3348,10 +3386,10 @@ genheader:
 	;;
 	.mmb
 	mov r1 = r37
-	cmp4.ne p6, p7 = 0, r8
+	mov r38 = r32
 	nop 0
 	.mmb
-	mov r38 = r32
+	cmp4.ne p6, p7 = 0, r8
 	adds r32 = 1, r32
 	(p7) br.cond.dpnt .L148
 	;;
@@ -3691,4 +3729,4 @@ main:
 	.size	formats#, 1352
 formats:
 	.skip	1352
-	.ident	"GCC: (GNU) 3.4 20030417 (experimental)"
+	.ident	"GCC: (GNU) 3.4 20030415 (experimental)"



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