gcc backend general question

[Spundun]

Hi
I am trying to configure gcc backend for a new architecture. This
architecture has only 32bit memory references, so for QI and HI moves I
have to do masking and shifting....
I was wondering if there exist such a configuration fo r some other
architecture which I could study. 
i.e. Is there an architecture in gcc/config where 1 byte and 2 byte
memory accesses are performed using SI(4byte) moves?
Thanx
Spundun