REG_CLASS_CONTENTS, >32 registers and 64-bit hosts

[Marek Michalkiewicz]

(Still no reply from Red Hat admins why my mail server is not valid.
Let's see if this mail goes through...)

>         mov __SPH__,r27  ;  77  *movhi/6        [length = 2]
>         mov __SPL__,r26
> 
> so I assume it's an assembler bug, not a compiler bug.

It's a compiler bug for sure - __SPH__ etc. is not a valid register name
for "mov", and the stack pointer consists of two 8-bit I/O registers
accessed with a different instruction.  The correct code is:

	in __tmp_reg__,__SREG__		; save interrupt enable flag
	cli				; disable interrupts
	out __SP_H__,r27		; write stack pointer high byte
	out __SREG__,__tmp_reg__	; restore interrupt enable flag
					; (takes effect only after the
					; next instruction)
	out __SP_L__,r26		; write stack pointer low byte

(Would be really nice if Atmel made the chip disable interrupts for one
instruction after writing SPH, but they didn't...)

In config/avr/avr.c (output_movhi), test_hard_reg_class (STACK_REG, dest)
determines if we are writing the stack pointer - and it thinks DEST is
not in the STACK_REG class, when in fact it is...  STACK_POINTER_REGNUM
is 32, while general registers have lower numbers.

I've been given remote access to an ia64 box, so I'll try to debug that
further over the weekend...

Marek