paradoxical subreg problem

[law@redhat.com]

In message <10201282114.AA26279@vlsi1.ultra.nyu.edu>, Richard Kenner writes:
 >     Kenner's initial claim was not that they were undefined, but that they
 >     were bits we could pretend had any value that was interesting to us
 >     (don't care).  If you read the section on paradoxical subregs, this is
 >     what it implies.
 > 
 > I must say I don't understand the distinction between those two cases.
In the don't care case, you can assume they have any value you want and
make optimizations based on that.  Going back to the original comparison:

(eq (subreg:SI (mem/s:QI (plus:SI (reg:SI 3 %r3)
                (const_int 15 [0xf])) 1) 0)
    (mem/s:SI (plus:SI (reg:SI 3 %r3)
            (const_int 12 [0xc])) 1))

The ability to assume that the upper 24 bits in the first operand have any
convenient value (don't care) allows you do equate both arms, creating
an expression that optimizes into a compile-time constant.  This is what
combine does right now.  [ ie, you are allowed to assume that the upper
bits in the first operand match the upper bits in the second operand].

If the upper 24 bits in the first operand are undefined, then we can make
*no* assumptions about what value they might have.  Thus we can't optimize
away the comparison.

Or to look at the second example.  Given these two expressions:

(and:SI (subreg:SI (mem:QI) 0) (const_int 255))

(subreg:SI (mem:QI X) 0)

If the semantics are "don't care", then we can assume the upper bits of
the second expression are all zero and the two expressions are equivalent
(ie, they can be used interchangably).

However, if the semantics are "undefined", then the second expression's
upper 24bits are undefined whereas the first expressions upper bits are known
to have the value 0.  Which means the expressions can not be used 
interchangably.


jeff