ldreqd instruction in xscale

Richard Earnshaw rearnsha@arm.com
Fri Jan 25 04:45:00 GMT 2002


> ldr<cond>d and str<cond>d are specific to Intel's ARM processor (think that documentation is available at Intel.com on this
> (and probably also at the ARM web site...).

Wrong.  They are defined by ARM architecture version 5 (which the XScale 
implements).

> 
> ldrd/strd  use an even/odd register pair and an 8-byte aligned memory address to transfer 8 bytes of data.
> It's faster than ldm/stm....

But only works for an address that is 8-byte aligned.  Which isn't much 
use for most C programs given that no type requires 8-byte alignment :-(

R.



More information about the Gcc mailing list