x86 optimization and rtx_cost question

[Tom Crispin]

Richard Henderson wrote:
> 
> On Fri, Jan 11, 2002 at 03:42:59PM -0600, Tom Crispin wrote:
> > But is there any code that worries about address generation interlock?
> 
> Not outside the scheduler, no.
> 
> > And shouldn't the decision about which to use depend on whether or not
> > we can schedule instructions into the interlock slots?
> 
> Ideally, yes.  But that is a severe phase ordering problem, and
> there's no way to get that sort of information when you want it.
> 
> r~


Well, I don't see where in the scheduler there is code to check for AGI
- maybe I'm looking in the wrong place.  I'll do some debugging
dumps....

Thanks


-- 
Tom Crispin
Centaur Technology
512-493-8625
crispin@centtech.com