Performance with Intel Foster chip

[Davide Libenzi]

On Fri, 22 Feb 2002, Mark Hahn wrote:

> > I believe these units are visiable via hyperthreading functionallity, so
> > any code that is multithreaded can take advantage of that (with some kernel
> > side tunning).
>
> HT simply turns a single processor, whose internal functional units
> are often idle or stalled, into two processors.  the hope is to "soak up"
> some of those idle units, and/or to overlap stalled and busy areas.
> the OS interface is almost exactly like you simply doubled each CPU -
> you have to boot them, appear to have separate registers, mmu context,
> bios suddenly shows 2x, etc.
>
> I don't see any involvement of gcc, except that it lessens the
> accuracy of the cost predictions that drive instruction selection.

According to a recent Intel white paper, they claim that HT get make you
get 10-12% improvements with unaware code and up to 33% with aware code.
Since the cores basically shares 'everything' but register banks, memory
accesses become particularly critical.




- Davide