Question about GO_IF_LEGITIMIZE_ADDRESS

Peter Barada pbarada@mail.wm.sps.mot.com
Mon Feb 18 16:40:00 GMT 2002


>You can attempt games by which you match the mem and address
>explicitly, e.g.
>
>  [(set (zero_extract:SI
>	  (mem:QI (match_operand:SI 0 "register_operand" "a"))
>          (const_int 1)
>          (minus:SI (const_int 7) (match_operand:SI 1 "general_operand" "d")))
>        (const_int 0))]
>
>  [(set (zero_extract:SI
>	  (mem:QI (plus:SI
>		    (match_operand:SI 0 "register_operand" "a")
>		    (match_operand:SI 1 "nonmemory_operand" "id")))
>          (const_int 1)
>          (minus:SI (const_int 7) (match_operand:SI 1 "general_operand" "d")))
>        (const_int 0))]

m68k.md currently has:

(define_insn ""
  [(set (cc0) (zero_extract (match_operand:QI 0 "memory_operand" "o")
			    (const_int 1)
			    (minus:SI (const_int 7)
				      (match_operand:SI 1 "general_operand" "d"))))]
  "TARGET_5200"
  "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")

Does reload follow the predicate enough that I can have:

(define_insn ""
  [(set (cc0) (zero_extract (match_operand:QI 0 "btst_mem_operand" "<Q>S")
			    (const_int 1)
			    (minus:SI (const_int 7)
				      (match_operand:SI 1 "general_operand" "d"))))]
  "TARGET_CFV4"
  "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")

Where the constaints '<Q>S' cover addressing modes 2-5, and the
function btsts_mem_operand looks something like: 

int
btst_mem_operand (op, mode)
     register rtx op;
     enum machine_mode mode;
{
  enum rtx_code code;

  /* It has to me a memory reference */
  if (GET_CODE (op) != MEM)
    return 0;

  code = GET_CODE (XEXP (op, 0));
  /* if indirect, predec, postinc, its fine */
  if (code == REG || code == PRE_DEC || code == POST_INC)
    return 1;

  /* Check on register offset */
  if (code == PLUS &&
    GET_CODE (XEXP (XEXP (op, 0), 0)) == REG 
        && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
    return 1;

  /* Otherwise regiect it */
  return 0;
}

Or do I have to explicitely spell out all of them:

(define_insn "btst_mem_2"
  [(set (cc0) (zero_extract (mem:QI (match_operand:SI 0 "register_operand" "a"))
			    (const_int 1)
			    (minus:SI (const_int 7)
				      (match_operand:SI 1 "general_operand" "d"))))]
  "TARGET_CFV4"
  "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")

(define_insn "btst_mem_3"
  [(set (cc0) (zero_extract (mem:QI (post_inc:SI (match_operand:SI 0 "register_operand" "a")))
			    (const_int 1)
			    (minus:SI (const_int 7)
				      (match_operand:SI 1 "general_operand" "d"))))]
  "TARGET_CFV4"
  "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")

(define_insn "btst_mem_4"
  [(set (cc0) (zero_extract (mem:QI (pre_dec:SI (match_operand:SI 0 "register_operand" "a")))
			    (const_int 1)
			    (minus:SI (const_int 7)
				      (match_operand:SI 1 "general_operand" "d"))))]
  "TARGET_CFV4"
  "* { return output_btst (operands, operands[1], operands[0], insn, 7); }")


...

-- 
Peter Barada                                   Peter.Barada@motorola.com
Wizard                                         781-852-2768 (direct)
WaveMark Solutions(wholly owned by Motorola)   781-270-0193 (fax)



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