How to define "implicit extend"

[devik]

> > Is there way to tell GCC that all registers can be zero_extended
> > just by pretending they already are ?
>
> Kind of, but you don't want to do that -- it'll get you into
> more trouble than you want.  What you want is to add patterns
> such that the composition of zero_extend and the original
> operation is visible to the combiner.

Hello Richard,

are you speaking about having almost all patterns
duplicated like:

(define_insn "*addsi2"
  [(set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI
           (plus:SI (match_operand:SI 1 "register_operand" "r")
                    (match_operand:SI 2 "register_operand" "r"))))]
  "" "add.32 %2,%1,%0")

? Hmm.. It should work even if it means at least twice of patterns.
I tried this (the same for other modes):

(define_expand "zero_extendhisi2"
 [(set (subreg:HI (match_operand:SI 0 "register_operand" "=r") 0)
        (match_operand:HI 1 "register_operand" "r"))]
 "" "")

And it seems to do the trick. Of course TRULY_NOOP_TRUNCATION must
be 0 (but it is ok for f-cpu) or it would allow thing like

uint i,j; i = (ushort)j;

to be replaced by simple 32 bit move. Do you know other scenario
where above definition of zero_extendhisi2 could do bad things ?

thanks,
devik