target register load optimizations (Was: Re: Porting gcc for F-CPU without direct JMP)

[Stephen Clarke]

From: "Joern Rennecke"
Sent: Friday, December 13, 2002 12:42 PM


> We have some local code here at SuperH, written by Stephen Clarke, that
> we are considering to contribute.  It estimates the execution frequency
> of basic blocks according to their loop depth, and re-allocates target
> registers and changes their loads so that they are loaded in less frequently
> executed blocks.

I would expect that in the current FSF gcc sources, you can use the generic
execution frequency information, rather than the loop-depth based
frequency estimation we originally had?    This would give
profile-directed placement of the target register loads (assuming
the profiling feedback option is available on the target).

Steve.


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