PIC on m68k - the saga continues

[Jim Wilson]

>One thing that I noticed is in the new legitimize_pic_address:
>        reg = gen_reg_rtx (Pmode);

You can't call gen_reg_rtx during or after register allocation.  This will
result in pseudo registers that never get allocated.

>This generates a single instruction to handle the PIC, but in the case
>of ColdFire I need to split this into two instructions, one to load
>the value of the symbol address(with @GOT relocation) into the temp
>register, and the other to actually load the temp with %a5 + the value
>that was in temp.

This is best taken care of by making sure that you never end up with such
as address in reload.  On a RISC, we generally fix such addresses in the mov*
patterns so that we never generate them.  See for instance the mips.md movsi
pattern and the call to pic_address_needs_scratch.  Such an address should not
be recognized as valid when pic.  See for instance the mips.h definition of
CONSTANT_ADDRESS_P.  Also, you need to modify the macro LEGITMATE_PIC_OPERAND_P
to reject such addresses.  All of this stuff needs to be coldfire dependent.
This is a little more complicated for a CISC, but the same basic principle
should work.

>     move.l (%r35),-(%sp)

There is no register 35.  This is a pseudo.  This is not valid in strict mode,
which is enforced during and after reload.  It is probably constrain_operands
that is rejecting it, not recog.

Jim