Bogus position independent code(PIC) emitted for ColdFire v4e

[Peter Barada]

I'm in the midst of bringin up a Linux kernel for a ColdFire v4e, and
I've just fallen into the rathole of dealing with PIC code.

Near the beggining of the init process, 'call_gmon_start' is called,
and its code currently looks like:

800000f8 <call_gmon_start>:
800000f8:	4e56 0000      	linkw %fp,#0
800000fc:	2f0d           	movel %a5,%sp@-
800000fe:	2a7c 0005 c830 	moveal #378928,%a5
80000104:	4bfb d8fa      	lea %pc@(80000100 <call_gmon_start+0x8>,%a5:l),%a5
80000108:	2075 0170 0000 	moveal %a5@(00000018),%a0
8000010e:	0018 
80000110:	4a88           	tstl %a0

Unfortunately ColdFire v4e can't handle the addressing mode of the
instruction at 0x80000108 since that requires a 32 bit offset.
I need to modify the compiler to generate PIC code for that
instruction to look like:

	 move.l  #0x18,%r
	 move.l  (%a5,%r),%a0

where '%r' is a temporary register.  I've started looking at
legitimize_pic_address, (gcc/config/m68k/m68k.c) and my eyes starte to
glaze over.  The leading comment indicates that the "compiler loads
the address of foo into a register".  Is this legitimize_pic_address,
or somewhere else that does this (say movsi)?

Could someone explain the comment "If we need more than one register,
we lose."

Where can I find a reference to how dynamic linking/PIC are supposed
to work(the general overview)?

Any suggestions on the best(or any!) way to emit working PIC for
ColdFire v4e would be most appreciated.

-- 
Peter Barada                                   Peter.Barada@motorola.com
Wizard                                         781-852-2768 (direct)
WaveMark Solutions(wholly owned by Motorola)   781-270-0193 (fax)