A bit of vector extension documentation

Daniel Berlin dan@cgsoftware.com
Fri Sep 28 15:37:00 GMT 2001


Diego Novillo <dnovillo@redhat.com> writes:

> On Fri, 28 Sep 2001, David Edelsohn wrote:
>
>> >>>>> Richard Henderson writes:
>> 
>> Richard> On Fri, Sep 28, 2001 at 11:48:31AM -0400, Daniel Berlin wrote:
>> >> It's based on the algorithms in the paper "Exploiting superword level 
>> >> parallelism with multimedia instruction sets"
>> >> http://www.acm.org/pubs/citations/proceedings/pldi/349299/p145-larsen/
>> 
>> Richard> Yes, I've seen that one.  While a nice starting point, I don't 
>> Richard> think it's as powerful as some of the other loop-based vectorization
>> Richard> algorithms.
>> 
>> 	I thought the point of the paper is that it is a generalization
>> that does not require loops.  For SIMD, as opposed to vector,
>> architectures, it might be better because it can take advantage of such
>> instructions without the loop setup overhead.
>> 
> Yes, the paper does not attempt to design a vectorizing compiler.
> It merely points out that in several cases you can get away with
> converting sequence of expressions into SIMD instructions.  They
> do have the limitation of working on single basic blocks, though.
Sure, but this includes basic blocks inside loops.
Won't this take care of the majority of cases anyway?
>
> Diego.

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