WORD_REGISTER_OPERATIONS/LOAD_EXTEND_OP

[Bernd Schmidt]

On Wed, 11 Apr 2001, Joern Rennecke wrote:

> > That's essentially what LOAD_EXTEND_OP means.  The question is, what exactly
> > does WORD_REGISTER_OPERATIONS mean?  Apparently, the code assumes that a
>
> tm.texi explains this:
>
> @findex WORD_REGISTER_OPERATIONS
> @item WORD_REGISTER_OPERATIONS
> Define this macro if operations between registers with integral mode
> smaller than a word are always performed on the entire register.
> Most RISC machines have this property and most CISC machines do not.

I know, but why would an optimizer want to know this?

> > (subreg:mode2 (reg:mode1)) always has the upper half properly extended.
> > That's not the case, however: consider left shifts and (unsigned) additions
> > and subtractions.  To me it seems like the entire concept behind
> > WORD_REGISTER_OPERATIONS is flawed.
>
> No, the way combine uses it is flawed.  Instead of widining the values just
> before checking, it should widen the operations that are folded.

Hmm?  You mean if it sees a HImode operation it should widen it to SImode?
But if WORD_REGISTER_OPERATIONS is defined, we won't even see HImode
operations because the machine doesn't define patterns for them, right?

Still confused,


Bernd