VLIW architectures

Dragos Badea badrian@ss.pub.ro
Sun Mar 19 23:11:00 GMT 2000


        Hello 
everybody!
 
    Could you tell me, please, how does gcc 
support optimizations for VLIW architectures? For instance, how does it deal at 
instruction scheduling and register allocation passes? 
Moreover, is there any special format for 
assembler output?
 
  Thank you very much,
   Adrian  



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