implementing parallel add/sub for short datatypes

Erhan Bilgili
Fri Feb 11 02:30:00 GMT 2000


	i just would like to ask something .is it possible to implement 2
15 bit add/subs or 7 bit add/subs on a asingle 32 bit integer register
with only single add ,with gcc ? something like the mmx does but with the
restriction of 32 bit register and size_in_bits(datatype)-1 sized data
type. also no need for the {f}emms switch , and still be able to use
floating point . taht should come handy for small loop blocks where both
floating point and this type of parallelism used - also on cpu's where
simd style insns does not exist and also whre switching like emms causes
to much noise for small blocks . did not try this . any ideas ? maybe
something to consider when some proper simd support added ... does gcc
optimize in someway like this ?

	Erhan Bilgili

More information about the Gcc mailing list